The driver needs the number of bytes per pixel, not the bpp and depth
info meant for fbdev compatibility. Use the right API.

Signed-off-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
---
Changes since v3:

- Renamed bpp to cpp
---
 drivers/gpu/drm/radeon/radeon_fb.c  | 20 ++++++++++----------
 drivers/gpu/drm/radeon/radeon_gem.c |  3 ++-
 2 files changed, 12 insertions(+), 11 deletions(-)

Cc: Alex Deucher <alexander.deucher at amd.com>
Cc: Christian König <christian.koenig at amd.com>
Cc: Michel Dänzer <michel at daenzer.net>

diff --git a/drivers/gpu/drm/radeon/radeon_fb.c 
b/drivers/gpu/drm/radeon/radeon_fb.c
index 568e036d547e..f4d6899ce3bb 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -61,13 +61,13 @@ static struct fb_ops radeonfb_ops = {
 };


-int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool 
tiled)
+int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool 
tiled)
 {
        int aligned = width;
        int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
        int pitch_mask = 0;

-       switch (bpp / 8) {
+       switch (cpp) {
        case 1:
                pitch_mask = align_large ? 255 : 127;
                break;
@@ -82,7 +82,7 @@ int radeon_align_pitch(struct radeon_device *rdev, int width, 
int bpp, bool tile

        aligned += pitch_mask;
        aligned &= ~pitch_mask;
-       return aligned;
+       return aligned * cpp;
 }

 static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
@@ -111,13 +111,13 @@ static int radeonfb_create_pinned_object(struct 
radeon_fbdev *rfbdev,
        int ret;
        int aligned_size, size;
        int height = mode_cmd->height;
-       u32 bpp, depth;
+       u32 cpp;

-       drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
+       cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0);

        /* need to align pitch with crtc limits */
-       mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
-                                                 fb_tiled) * ((bpp + 1) / 8);
+       mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp,
+                                                 fb_tiled);

        if (rdev->family >= CHIP_R600)
                height = ALIGN(mode_cmd->height, 8);
@@ -137,11 +137,11 @@ static int radeonfb_create_pinned_object(struct 
radeon_fbdev *rfbdev,
                tiling_flags = RADEON_TILING_MACRO;

 #ifdef __BIG_ENDIAN
-       switch (bpp) {
-       case 32:
+       switch (cpp) {
+       case 4:
                tiling_flags |= RADEON_TILING_SWAP_32BIT;
                break;
-       case 16:
+       case 2:
                tiling_flags |= RADEON_TILING_SWAP_16BIT;
        default:
                break;
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c 
b/drivers/gpu/drm/radeon/radeon_gem.c
index deb9511725c9..0bcffd8a7bd3 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -745,7 +745,8 @@ int radeon_mode_dumb_create(struct drm_file *file_priv,
        uint32_t handle;
        int r;

-       args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * 
((args->bpp + 1) / 8);
+       args->pitch = radeon_align_pitch(rdev, args->width,
+                                        DIV_ROUND_UP(args->bpp, 8), 0);
        args->size = args->pitch * args->height;
        args->size = ALIGN(args->size, PAGE_SIZE);

-- 
Regards,

Laurent Pinchart

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