tree: git://anongit.freedesktop.org/drm-intel for-linux-next
head: af2788925ae0b83737ee847c5b2e9f19c5bf3630
commit: af2788925ae0b83737ee847c5b2e9f19c5bf3630 [4/4] drm/i915: Squelch reset
messages during selftests
config: i386-randconfig-x013-201730 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
git checkout af2788925ae0b83737ee847c5b2e9f19c5bf3630
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/intel_hangcheck.c:485:0:
drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function
'igt_render_engine_reset_fallback':
>> drivers/gpu/drm/i915/selftests/intel_hangcheck.c:845:3: error: too few
>> arguments to function 'i915_reset'
i915_reset(i915);
^~~~~~~~~~
In file included from drivers/gpu/drm/i915/intel_hangcheck.c:25:0:
drivers/gpu/drm/i915/i915_drv.h:3115:13: note: declared here
extern void i915_reset(struct drm_i915_private *i915, unsigned int flags);
^~~~~~~~~~
vim +/i915_reset +845 drivers/gpu/drm/i915/selftests/intel_hangcheck.c
496b575e Chris Wilson 2017-02-13 772
abeb4def Michel Thierry 2017-06-20 773 static int
igt_render_engine_reset_fallback(void *arg)
abeb4def Michel Thierry 2017-06-20 774 {
abeb4def Michel Thierry 2017-06-20 775 struct drm_i915_private *i915 =
arg;
abeb4def Michel Thierry 2017-06-20 776 struct intel_engine_cs *engine
= i915->engine[RCS];
abeb4def Michel Thierry 2017-06-20 777 struct hang h;
abeb4def Michel Thierry 2017-06-20 778 struct drm_i915_gem_request *rq;
abeb4def Michel Thierry 2017-06-20 779 unsigned int reset_count,
reset_engine_count;
abeb4def Michel Thierry 2017-06-20 780 int err = 0;
abeb4def Michel Thierry 2017-06-20 781
abeb4def Michel Thierry 2017-06-20 782 /* Check that we can issue a
global GPU and engine reset */
abeb4def Michel Thierry 2017-06-20 783
abeb4def Michel Thierry 2017-06-20 784 if
(!intel_has_reset_engine(i915))
abeb4def Michel Thierry 2017-06-20 785 return 0;
abeb4def Michel Thierry 2017-06-20 786
5b3d2c87 Chris Wilson 2017-07-21 787 global_reset_lock(i915);
5b3d2c87 Chris Wilson 2017-07-21 788
abeb4def Michel Thierry 2017-06-20 789
mutex_lock(&i915->drm.struct_mutex);
abeb4def Michel Thierry 2017-06-20 790
abeb4def Michel Thierry 2017-06-20 791 err = hang_init(&h, i915);
abeb4def Michel Thierry 2017-06-20 792 if (err)
774eed4a Chris Wilson 2017-06-23 793 goto err_unlock;
abeb4def Michel Thierry 2017-06-20 794
abeb4def Michel Thierry 2017-06-20 795 rq = hang_create_request(&h,
engine, i915->kernel_context);
abeb4def Michel Thierry 2017-06-20 796 if (IS_ERR(rq)) {
abeb4def Michel Thierry 2017-06-20 797 err = PTR_ERR(rq);
774eed4a Chris Wilson 2017-06-23 798 goto err_fini;
abeb4def Michel Thierry 2017-06-20 799 }
abeb4def Michel Thierry 2017-06-20 800
abeb4def Michel Thierry 2017-06-20 801 i915_gem_request_get(rq);
abeb4def Michel Thierry 2017-06-20 802 __i915_add_request(rq, true);
abeb4def Michel Thierry 2017-06-20 803
abeb4def Michel Thierry 2017-06-20 804 /* make reset engine fail */
abeb4def Michel Thierry 2017-06-20 805 rq->fence.error = -EIO;
abeb4def Michel Thierry 2017-06-20 806
abeb4def Michel Thierry 2017-06-20 807 if (!wait_for_hang(&h, rq)) {
abeb4def Michel Thierry 2017-06-20 808 pr_err("Failed to start
request %x\n", rq->fence.seqno);
abeb4def Michel Thierry 2017-06-20 809 err = -EIO;
774eed4a Chris Wilson 2017-06-23 810 goto err_request;
abeb4def Michel Thierry 2017-06-20 811 }
abeb4def Michel Thierry 2017-06-20 812
abeb4def Michel Thierry 2017-06-20 813 reset_engine_count =
i915_reset_engine_count(&i915->gpu_error, engine);
abeb4def Michel Thierry 2017-06-20 814 reset_count =
fake_hangcheck(rq);
abeb4def Michel Thierry 2017-06-20 815
abeb4def Michel Thierry 2017-06-20 816 /* unlock since we'll call
handle_error */
abeb4def Michel Thierry 2017-06-20 817
mutex_unlock(&i915->drm.struct_mutex);
5b3d2c87 Chris Wilson 2017-07-21 818 global_reset_unlock(i915);
abeb4def Michel Thierry 2017-06-20 819
abeb4def Michel Thierry 2017-06-20 820 i915_handle_error(i915,
intel_engine_flag(engine), "live test");
abeb4def Michel Thierry 2017-06-20 821
abeb4def Michel Thierry 2017-06-20 822 if
(i915_reset_engine_count(&i915->gpu_error, engine) !=
abeb4def Michel Thierry 2017-06-20 823 reset_engine_count) {
abeb4def Michel Thierry 2017-06-20 824 pr_err("render engine
reset recorded! (full reset expected)\n");
abeb4def Michel Thierry 2017-06-20 825 err = -EINVAL;
abeb4def Michel Thierry 2017-06-20 826 goto out_rq;
abeb4def Michel Thierry 2017-06-20 827 }
abeb4def Michel Thierry 2017-06-20 828
abeb4def Michel Thierry 2017-06-20 829 if
(i915_reset_count(&i915->gpu_error) == reset_count) {
abeb4def Michel Thierry 2017-06-20 830 pr_err("No full GPU
reset recorded!\n");
abeb4def Michel Thierry 2017-06-20 831 err = -EINVAL;
abeb4def Michel Thierry 2017-06-20 832 goto out_rq;
abeb4def Michel Thierry 2017-06-20 833 }
abeb4def Michel Thierry 2017-06-20 834
abeb4def Michel Thierry 2017-06-20 835 /*
abeb4def Michel Thierry 2017-06-20 836 * by using fence.error = -EIO,
full reset sets the wedged flag, do one
abeb4def Michel Thierry 2017-06-20 837 * more full reset to re-enable
the hw.
abeb4def Michel Thierry 2017-06-20 838 */
abeb4def Michel Thierry 2017-06-20 839 if
(i915_terminally_wedged(&i915->gpu_error)) {
5b3d2c87 Chris Wilson 2017-07-21 840 global_reset_lock(i915);
abeb4def Michel Thierry 2017-06-20 841 rq->fence.error = 0;
abeb4def Michel Thierry 2017-06-20 842
774eed4a Chris Wilson 2017-06-23 843
mutex_lock(&i915->drm.struct_mutex);
abeb4def Michel Thierry 2017-06-20 844
set_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags);
abeb4def Michel Thierry 2017-06-20 @845 i915_reset(i915);
abeb4def Michel Thierry 2017-06-20 846
GEM_BUG_ON(test_bit(I915_RESET_HANDOFF,
abeb4def Michel Thierry 2017-06-20 847
&i915->gpu_error.flags));
774eed4a Chris Wilson 2017-06-23 848
mutex_unlock(&i915->drm.struct_mutex);
abeb4def Michel Thierry 2017-06-20 849
abeb4def Michel Thierry 2017-06-20 850 if
(i915_reset_count(&i915->gpu_error) == reset_count) {
abeb4def Michel Thierry 2017-06-20 851 pr_err("No full
GPU reset recorded!\n");
abeb4def Michel Thierry 2017-06-20 852 err = -EINVAL;
abeb4def Michel Thierry 2017-06-20 853 goto out_rq;
abeb4def Michel Thierry 2017-06-20 854 }
abeb4def Michel Thierry 2017-06-20 855 }
abeb4def Michel Thierry 2017-06-20 856
abeb4def Michel Thierry 2017-06-20 857 out_rq:
abeb4def Michel Thierry 2017-06-20 858 i915_gem_request_put(rq);
abeb4def Michel Thierry 2017-06-20 859 hang_fini(&h);
774eed4a Chris Wilson 2017-06-23 860 out_backoff:
5b3d2c87 Chris Wilson 2017-07-21 861 global_reset_unlock(i915);
abeb4def Michel Thierry 2017-06-20 862
abeb4def Michel Thierry 2017-06-20 863 if
(i915_terminally_wedged(&i915->gpu_error))
abeb4def Michel Thierry 2017-06-20 864 return -EIO;
abeb4def Michel Thierry 2017-06-20 865
abeb4def Michel Thierry 2017-06-20 866 return err;
774eed4a Chris Wilson 2017-06-23 867
774eed4a Chris Wilson 2017-06-23 868 err_request:
774eed4a Chris Wilson 2017-06-23 869 i915_gem_request_put(rq);
774eed4a Chris Wilson 2017-06-23 870 err_fini:
774eed4a Chris Wilson 2017-06-23 871 hang_fini(&h);
774eed4a Chris Wilson 2017-06-23 872 err_unlock:
774eed4a Chris Wilson 2017-06-23 873
mutex_unlock(&i915->drm.struct_mutex);
774eed4a Chris Wilson 2017-06-23 874 goto out_backoff;
abeb4def Michel Thierry 2017-06-20 875 }
abeb4def Michel Thierry 2017-06-20 876
:::::: The code at line 845 was first introduced by commit
:::::: abeb4def31d9c3dbf06052e65cd884730ec8667e drm/i915/selftests: reset
engine self tests
:::::: TO: Michel Thierry <michel.thie...@intel.com>
:::::: CC: Chris Wilson <ch...@chris-wilson.co.uk>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
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