Now that the core has a drm format helper to tell if a format embeds an
alpha component in it, let's use it.
Cc: Inki Dae <inki....@samsung.com>
Cc: Joonyoung Shim <jy0922.s...@samsung.com>
Cc: Kyungmin Park <kyungmin.p...@samsung.com>
Cc: Seung-Woo Kim <sw0312....@samsung.com>
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
drivers/gpu/drm/exynos/exynos_mixer.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c
b/drivers/gpu/drm/exynos/exynos_mixer.c
index dc5d79465f9b..d7339a6d072c 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -179,18 +179,6 @@ static const u8 filter_cr_horiz_tap4[] = {
70, 59, 48, 37, 27, 19, 11, 5,
};
-static inline bool is_alpha_format(unsigned int pixel_format)
-{
- switch (pixel_format) {
- case DRM_FORMAT_ARGB8888:
- case DRM_FORMAT_ARGB1555:
- case DRM_FORMAT_ARGB4444:
- return true;
- default:
- return false;
- }
-}
-
static inline u32 vp_reg_read(struct mixer_context *ctx, u32 reg_id)
{
return readl(ctx->vp_regs + reg_id);
@@ -625,7 +613,7 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
mixer_reg_write(ctx, MXR_GRAPHIC_BASE(win), dma_addr);
mixer_cfg_layer(ctx, win, priority, true);
- mixer_cfg_gfx_blend(ctx, win, is_alpha_format(fb->format->format));
+ mixer_cfg_gfx_blend(ctx, win, drm_format_has_alpha(fb->format->format));
/* layer update mandatory for mixer 16.0.33.0 */
if (ctx->mxr_ver == MXR_VER_16_0_33_0 ||
--
git-series 0.9.1
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