tree: git://people.freedesktop.org/~agd5f/linux.git amd-mainline-dkms-4.15
head: 9556f93f18f7923978fb90f860c107fed9ca7f57
commit: c756d628b20a12f50c43df1cfbe24fd72b5a47b4 [1135/1759] drm/amd/amdgpu:
adapt dgma to the new vam_mgr
smatch warnings:
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:1422 amdgpu_vm_bo_split_mapping() warn:
if statement not indented
git remote add radeon-alex git://people.freedesktop.org/~agd5f/linux.git
git remote update radeon-alex
git checkout c756d628b20a12f50c43df1cfbe24fd72b5a47b4
vim +1422 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
d38ceaf9 Alex Deucher 2015-04-20 1344
d38ceaf9 Alex Deucher 2015-04-20 1345 /**
a14faa65 Christian König 2016-01-25 1346 * amdgpu_vm_bo_split_mapping -
split a mapping into smaller chunks
a14faa65 Christian König 2016-01-25 1347 *
a14faa65 Christian König 2016-01-25 1348 * @adev: amdgpu_device pointer
3cabaa54 Christian König 2016-06-06 1349 * @exclusive: fence we need to sync
to
8358dcee Christian König 2016-03-30 1350 * @pages_addr: DMA addresses to use
for mapping
a14faa65 Christian König 2016-01-25 1351 * @vm: requested vm
a14faa65 Christian König 2016-01-25 1352 * @mapping: mapped range and flags
to use for the update
8358dcee Christian König 2016-03-30 1353 * @flags: HW flags for the mapping
c756d628 Flora Cui 2016-10-10 1354 * @mem: ttm_mem_reg holding array
of drm_mm_nodes with the MC addresses
a14faa65 Christian König 2016-01-25 1355 * @fence: optional resulting fence
a14faa65 Christian König 2016-01-25 1356 *
a14faa65 Christian König 2016-01-25 1357 * Split the mapping into smaller
chunks so that each update fits
a14faa65 Christian König 2016-01-25 1358 * into a SDMA IB.
a14faa65 Christian König 2016-01-25 1359 * Returns 0 for success, -EINVAL
for failure.
a14faa65 Christian König 2016-01-25 1360 */
a14faa65 Christian König 2016-01-25 1361 static int
amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
f54d1867 Chris Wilson 2016-10-25 1362
struct dma_fence *exclusive,
8358dcee Christian König 2016-03-30 1363
dma_addr_t *pages_addr,
a14faa65 Christian König 2016-01-25 1364
struct amdgpu_vm *vm,
a14faa65 Christian König 2016-01-25 1365
struct amdgpu_bo_va_mapping *mapping,
6b777607 Chunming Zhou 2016-09-21 1366
uint64_t flags,
c756d628 Flora Cui 2016-10-10 1367
struct ttm_mem_reg *mem,
f54d1867 Chris Wilson 2016-10-25 1368
struct dma_fence **fence)
a14faa65 Christian König 2016-01-25 1369 {
c756d628 Flora Cui 2016-10-10 1370 struct drm_mm_node *nodes = mem
? mem->mm_node : NULL;
9fc8fc70 Christian König 2017-09-18 1371 unsigned min_linear_pages = 1
<< adev->vm_manager.fragment_size;
570144c6 Christian König 2017-08-30 1372 uint64_t pfn, start =
mapping->start;
a14faa65 Christian König 2016-01-25 1373 int r;
a14faa65 Christian König 2016-01-25 1374
a14faa65 Christian König 2016-01-25 1375 /* normally,bo_va->flags only
contians READABLE and WIRTEABLE bit go here
a14faa65 Christian König 2016-01-25 1376 * but in case of something, we
filter the flags in first place
a14faa65 Christian König 2016-01-25 1377 */
a14faa65 Christian König 2016-01-25 1378 if (!(mapping->flags &
AMDGPU_PTE_READABLE))
a14faa65 Christian König 2016-01-25 1379 flags &=
~AMDGPU_PTE_READABLE;
a14faa65 Christian König 2016-01-25 1380 if (!(mapping->flags &
AMDGPU_PTE_WRITEABLE))
a14faa65 Christian König 2016-01-25 1381 flags &=
~AMDGPU_PTE_WRITEABLE;
a14faa65 Christian König 2016-01-25 1382
15b31c59 Alex Xie 2017-03-03 1383 flags &= ~AMDGPU_PTE_EXECUTABLE;
15b31c59 Alex Xie 2017-03-03 1384 flags |= mapping->flags &
AMDGPU_PTE_EXECUTABLE;
15b31c59 Alex Xie 2017-03-03 1385
b0fd18b0 Alex Xie 2017-03-03 1386 flags &= ~AMDGPU_PTE_MTYPE_MASK;
b0fd18b0 Alex Xie 2017-03-03 1387 flags |= (mapping->flags &
AMDGPU_PTE_MTYPE_MASK);
b0fd18b0 Alex Xie 2017-03-03 1388
d0766e98 Zhang, Jerry 2017-04-19 1389 if ((mapping->flags &
AMDGPU_PTE_PRT) &&
d0766e98 Zhang, Jerry 2017-04-19 1390 (adev->asic_type >=
CHIP_VEGA10)) {
d0766e98 Zhang, Jerry 2017-04-19 1391 flags |= AMDGPU_PTE_PRT;
d0766e98 Zhang, Jerry 2017-04-19 1392 flags &=
~AMDGPU_PTE_VALID;
d0766e98 Zhang, Jerry 2017-04-19 1393 }
d0766e98 Zhang, Jerry 2017-04-19 1394
a14faa65 Christian König 2016-01-25 1395
trace_amdgpu_vm_bo_update(mapping);
a14faa65 Christian König 2016-01-25 1396
63e0ba40 Christian König 2016-08-16 1397 pfn = mapping->offset >>
PAGE_SHIFT;
63e0ba40 Christian König 2016-08-16 1398 if (nodes) {
63e0ba40 Christian König 2016-08-16 1399 while (pfn >=
nodes->size) {
63e0ba40 Christian König 2016-08-16 1400 pfn -=
nodes->size;
63e0ba40 Christian König 2016-08-16 1401 ++nodes;
63e0ba40 Christian König 2016-08-16 1402 }
63e0ba40 Christian König 2016-08-16 1403 }
63e0ba40 Christian König 2016-08-16 1404
63e0ba40 Christian König 2016-08-16 1405 do {
9fc8fc70 Christian König 2017-09-18 1406 dma_addr_t *dma_addr =
NULL;
63e0ba40 Christian König 2016-08-16 1407 uint64_t max_entries;
63e0ba40 Christian König 2016-08-16 1408 uint64_t addr, last;
c756d628 Flora Cui 2016-10-10 1409 uint64_t count;
63e0ba40 Christian König 2016-08-16 1410
63e0ba40 Christian König 2016-08-16 1411 if (nodes) {
63e0ba40 Christian König 2016-08-16 1412 addr =
nodes->start << PAGE_SHIFT;
63e0ba40 Christian König 2016-08-16 1413 max_entries =
(nodes->size - pfn) *
63e0ba40 Christian König 2016-08-16 1414
(PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
c756d628 Flora Cui 2016-10-10 1415 switch
(mem->mem_type) {
c756d628 Flora Cui 2016-10-10 1416 case TTM_PL_TT:
63e0ba40 Christian König 2016-08-16 1417
max_entries = min(max_entries, 16ull * 1024ull);
c756d628 Flora Cui 2016-10-10 1418
9fc8fc70 Christian König 2017-09-18 1419 for
(count = 1; count < max_entries; ++count) {
9fc8fc70 Christian König 2017-09-18 1420
uint64_t idx = pfn + count;
9fc8fc70 Christian König 2017-09-18 1421
9fc8fc70 Christian König 2017-09-18 @1422
if (pages_addr[idx] !=
9fc8fc70 Christian König 2017-09-18 1423
(pages_addr[idx - 1] + PAGE_SIZE))
9fc8fc70 Christian König 2017-09-18 1424
break;
^^^^^^
9fc8fc70 Christian König 2017-09-18 1425 }
9fc8fc70 Christian König 2017-09-18 1426
9fc8fc70 Christian König 2017-09-18 1427 if
(count < min_linear_pages) {
9fc8fc70 Christian König 2017-09-18 1428
addr = pfn << PAGE_SHIFT;
9fc8fc70 Christian König 2017-09-18 1429
dma_addr = pages_addr;
9fc8fc70 Christian König 2017-09-18 1430 } else {
9fc8fc70 Christian König 2017-09-18 1431
addr = pages_addr[pfn];
9fc8fc70 Christian König 2017-09-18 1432
max_entries = count;
9fc8fc70 Christian König 2017-09-18 1433 }
c756d628 Flora Cui 2016-10-10 1434 break;
c756d628 Flora Cui 2016-10-10 1435 case
AMDGPU_PL_DGMA_IMPORT:
c756d628 Flora Cui 2016-10-10 1436 addr =
0;
c756d628 Flora Cui 2016-10-10 1437
max_entries = min(max_entries, 16ull * 1024ull);
c756d628 Flora Cui 2016-10-10 1438
dma_addr = pages_addr;
c756d628 Flora Cui 2016-10-10 1439 break;
c756d628 Flora Cui 2016-10-10 1440 case
AMDGPU_PL_DGMA:
c756d628 Flora Cui 2016-10-10 1441 addr +=
adev->vm_manager.vram_base_offset +
c756d628 Flora Cui 2016-10-10 1442
adev->mman.bdev.man[mem->mem_type].gpu_offset -
c756d628 Flora Cui 2016-10-10 1443
adev->mman.bdev.man[TTM_PL_VRAM].gpu_offset;
c756d628 Flora Cui 2016-10-10 1444 addr +=
pfn << PAGE_SHIFT;
c756d628 Flora Cui 2016-10-10 1445 break;
c756d628 Flora Cui 2016-10-10 1446 case
TTM_PL_VRAM:
63e0ba40 Christian König 2016-08-16 1447 addr +=
adev->vm_manager.vram_base_offset;
63e0ba40 Christian König 2016-08-16 1448 addr +=
pfn << PAGE_SHIFT;
c756d628 Flora Cui 2016-10-10 1449 break;
c756d628 Flora Cui 2016-10-10 1450 default:
c756d628 Flora Cui 2016-10-10 1451 break;
c756d628 Flora Cui 2016-10-10 1452 }
c756d628 Flora Cui 2016-10-10 1453 } else {
c756d628 Flora Cui 2016-10-10 1454 addr = 0;
c756d628 Flora Cui 2016-10-10 1455 max_entries =
S64_MAX;
9fc8fc70 Christian König 2017-09-18 1456 }
a14faa65 Christian König 2016-01-25 1457
a9f87f64 Christian König 2017-03-30 1458 last =
min((uint64_t)mapping->last, start + max_entries - 1);
9fc8fc70 Christian König 2017-09-18 1459 r =
amdgpu_vm_bo_update_mapping(adev, exclusive, dma_addr, vm,
a14faa65 Christian König 2016-01-25 1460
start, last, flags, addr,
a14faa65 Christian König 2016-01-25 1461
fence);
a14faa65 Christian König 2016-01-25 1462 if (r)
a14faa65 Christian König 2016-01-25 1463 return r;
a14faa65 Christian König 2016-01-25 1464
63e0ba40 Christian König 2016-08-16 1465 pfn += last - start + 1;
63e0ba40 Christian König 2016-08-16 1466 if (nodes &&
nodes->size == pfn) {
63e0ba40 Christian König 2016-08-16 1467 pfn = 0;
63e0ba40 Christian König 2016-08-16 1468 ++nodes;
a14faa65 Christian König 2016-01-25 1469 }
63e0ba40 Christian König 2016-08-16 1470 start = last + 1;
63e0ba40 Christian König 2016-08-16 1471
a9f87f64 Christian König 2017-03-30 1472 } while (unlikely(start !=
mapping->last + 1));
a14faa65 Christian König 2016-01-25 1473
a14faa65 Christian König 2016-01-25 1474 return 0;
a14faa65 Christian König 2016-01-25 1475 }
a14faa65 Christian König 2016-01-25 1476
:::::: The code at line 1422 was first introduced by commit
:::::: 9fc8fc709b356c85034cbcb3b84c9d8b77865f52 drm/amdgpu: add VM support for
huge pages v2
:::::: TO: Christian König <christian.koe...@amd.com>
:::::: CC: Alex Deucher <alexander.deuc...@amd.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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