On Mon, Nov 05, 2018 at 04:31:02PM -0700, Jordan Crouse wrote:
> Remove more static inline functions that are lightly used and/or
> very simple and easy to build into the calling functions.
> 
> v2: Removed another unused function from dpu_hw_lm.c and add back
> dpu_crtc_get_client_type() since there was a question regarding
> its usefulness.
> 
> Signed-off-by: Jordan Crouse <jcro...@codeaurora.org>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c       | 12 +++---------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h       | 10 ----------
>  .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h   |  2 +-
>  .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c   | 11 ++---------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h |  9 ---------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c      |  6 ------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h      |  5 -----
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c    |  3 ++-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c        |  8 +-------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c      | 18 ++++--------------
>  10 files changed, 13 insertions(+), 71 deletions(-)
> 

/snip

> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
> index 3a67bb9f9d9d..94286b623874 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
> @@ -350,7 +350,7 @@ static inline enum dpu_3d_blend_mode 
> dpu_encoder_helper_get_3d_blend_mode(
>       dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);
>  
>       if (phys_enc->split_role == ENC_ROLE_SOLO &&
> -         dpu_crtc_state_is_stereo(dpu_cstate))
> +         (dpu_cstate->num_mixers == CRTC_DUAL_MIXERS))

nit: unnecessary ()

With that fixed,

Reviewed-by: Sean Paul <s...@poorly.run>


>               return BLEND_3D_H_ROW_INT;
>  
>       return BLEND_3D_NONE;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> index b37a0992e326..99ab5ca9bed3 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> @@ -44,14 +44,7 @@
>  
>  #define DPU_ENC_WR_PTR_START_TIMEOUT_US 20000
>  
> -static inline int _dpu_encoder_phys_cmd_get_idle_timeout(
> -             struct dpu_encoder_phys_cmd *cmd_enc)
> -{
> -     return KICKOFF_TIMEOUT_MS;
> -}
> -
> -static inline bool dpu_encoder_phys_cmd_is_master(
> -             struct dpu_encoder_phys *phys_enc)
> +static bool dpu_encoder_phys_cmd_is_master(struct dpu_encoder_phys *phys_enc)
>  {
>       return (phys_enc->split_role != ENC_ROLE_SLAVE) ? true : false;
>  }
> @@ -723,7 +716,7 @@ static int dpu_encoder_phys_cmd_wait_for_vblank(
>  
>       wait_info.wq = &cmd_enc->pending_vblank_wq;
>       wait_info.atomic_cnt = &cmd_enc->pending_vblank_cnt;
> -     wait_info.timeout_ms = _dpu_encoder_phys_cmd_get_idle_timeout(cmd_enc);
> +     wait_info.timeout_ms = KICKOFF_TIMEOUT_MS;
>  
>       atomic_inc(&cmd_enc->pending_vblank_cnt);
>  
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index dc060e7358e4..144358a3d0fb 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -736,13 +736,4 @@ struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev);
>   */
>  void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg);
>  
> -/**
> - * dpu_hw_sspp_multirect_enabled - check multirect enabled for the sspp
> - * @cfg:          pointer to sspp cfg
> - */
> -static inline bool dpu_hw_sspp_multirect_enabled(const struct dpu_sspp_cfg 
> *cfg)
> -{
> -     return test_bit(DPU_SSPP_SMART_DMA_V1, &cfg->features) ||
> -                      test_bit(DPU_SSPP_SMART_DMA_V2, &cfg->features);
> -}
>  #endif /* _DPU_HW_CATALOG_H */
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> index 9f342af2aba7..018df2c3b7ed 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> @@ -156,11 +156,6 @@ static void dpu_hw_lm_setup_color3(struct dpu_hw_mixer 
> *ctx,
>       DPU_REG_WRITE(c, LM_OP_MODE, op_mode);
>  }
>  
> -static void dpu_hw_lm_gc(struct dpu_hw_mixer *mixer,
> -                     void *cfg)
> -{
> -}
> -
>  static void _setup_mixer_ops(struct dpu_mdss_cfg *m,
>               struct dpu_hw_lm_ops *ops,
>               unsigned long features)
> @@ -172,7 +167,6 @@ static void _setup_mixer_ops(struct dpu_mdss_cfg *m,
>               ops->setup_blend_config = dpu_hw_lm_setup_blend_config;
>       ops->setup_alpha_out = dpu_hw_lm_setup_color3;
>       ops->setup_border_color = dpu_hw_lm_setup_border_color;
> -     ops->setup_gc = dpu_hw_lm_gc;
>  };
>  
>  static struct dpu_hw_blk_ops dpu_hw_ops;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
> index 5b036aca8340..6aee839a6a23 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
> @@ -61,11 +61,6 @@ struct dpu_hw_lm_ops {
>       void (*setup_border_color)(struct dpu_hw_mixer *ctx,
>               struct dpu_mdss_color *color,
>               u8 border_en);
> -     /**
> -      * setup_gc : enable/disable gamma correction feature
> -      */
> -     void (*setup_gc)(struct dpu_hw_mixer *mixer,
> -                     void *cfg);
>  };
>  
>  struct dpu_hw_mixer {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> index 3ebdf292d8f2..e9132bf5166b 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> @@ -661,7 +661,8 @@ static void _setup_layer_ops(struct dpu_hw_pipe *c,
>               test_bit(DPU_SSPP_CSC_10BIT, &features))
>               c->ops.setup_csc = dpu_hw_sspp_setup_csc;
>  
> -     if (dpu_hw_sspp_multirect_enabled(c->cap))
> +     if (test_bit(DPU_SSPP_SMART_DMA_V1, &c->cap->features) ||
> +             test_bit(DPU_SSPP_SMART_DMA_V2, &c->cap->features))
>               c->ops.setup_multirect = dpu_hw_sspp_setup_multirect;
>  
>       if (test_bit(DPU_SSPP_SCALER_QSEED3, &features)) {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index 3d0c93c49764..546fdd609b17 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -688,12 +688,6 @@ static const struct msm_kms_funcs kms_funcs = {
>  #endif
>  };
>  
> -/* the caller api needs to turn on clock before calling it */
> -static inline void _dpu_kms_core_hw_rev_init(struct dpu_kms *dpu_kms)
> -{
> -     dpu_kms->core_rev = readl_relaxed(dpu_kms->mmio + 0x0);
> -}
> -
>  static int _dpu_kms_mmu_destroy(struct dpu_kms *dpu_kms)
>  {
>       struct msm_mmu *mmu;
> @@ -849,7 +843,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
>  
>       pm_runtime_get_sync(&dpu_kms->pdev->dev);
>  
> -     _dpu_kms_core_hw_rev_init(dpu_kms);
> +     dpu_kms->core_rev = readl_relaxed(dpu_kms->mmio + 0x0);
>  
>       pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev);
>  
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index bcd8d46ffc38..688233dbd597 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -430,24 +430,14 @@ static void _dpu_plane_set_qos_remap(struct drm_plane 
> *plane)
>       dpu_vbif_set_qos_remap(dpu_kms, &qos_params);
>  }
>  
> -/**
> - * _dpu_plane_get_aspace: gets the address space
> - */
> -static inline struct msm_gem_address_space *_dpu_plane_get_aspace(
> -             struct dpu_plane *pdpu)
> -{
> -     struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
> -
> -     return kms->base.aspace;
> -}
> -
>  static void _dpu_plane_set_scanout(struct drm_plane *plane,
>               struct dpu_plane_state *pstate,
>               struct dpu_hw_pipe_cfg *pipe_cfg,
>               struct drm_framebuffer *fb)
>  {
>       struct dpu_plane *pdpu = to_dpu_plane(plane);
> -     struct msm_gem_address_space *aspace = _dpu_plane_get_aspace(pdpu);
> +     struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
> +     struct msm_gem_address_space *aspace = kms->base.aspace;
>       int ret;
>  
>       ret = dpu_format_populate_layout(aspace, fb, &pipe_cfg->layout);
> @@ -801,7 +791,7 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane,
>       struct drm_gem_object *obj;
>       struct msm_gem_object *msm_obj;
>       struct dma_fence *fence;
> -     struct msm_gem_address_space *aspace = _dpu_plane_get_aspace(pdpu);
> +     struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
>       int ret;
>  
>       if (!new_state->fb)
> @@ -810,7 +800,7 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane,
>       DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", fb->base.id);
>  
>       /* cache aspace */
> -     pstate->aspace = aspace;
> +     pstate->aspace = kms->base.aspace;
>  
>       /*
>        * TODO: Need to sort out the msm_framebuffer_prepare() call below so
> -- 
> 2.18.0
> 

-- 
Sean Paul, Software Engineer, Google / Chromium OS
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