On 16/05/2019 12:19, Robin Murphy wrote: [...] > I was expecting to see a similar behaviour to my T620 (which I now > assume was down to 64-bit job descriptors sort-of-but-not-quite working) > but this does look a bit more fundamental - the fact that it's a level 1 > fault with VA == head == tail suggests to me that the MMU can't see the > page tables at all to translate anything. I really hope that the H6 GPU > integration doesn't suffer from the same DMA offset as the Allwinner > display pipeline stuff, because that would be a real pain to support in > io-pgtable.
Assuming you mean the case where the physical address (as seen by the CPU) is different from the dma address (as seen by the GPU), then I highly doubt it because mali_kbase doesn't support it: [from kbase_mem_pool_alloc_page() in mali_kbase_mem_pool.c]: dma_addr = dma_map_page(dev, p, 0, PAGE_SIZE, DMA_BIDIRECTIONAL); if (dma_mapping_error(dev, dma_addr)) { __free_page(p); return NULL; } WARN_ON(dma_addr != page_to_phys(p)); That being said it's quite possible there could be something in the bus which needs configuring to make this work - in which case your best bet is to look at the vendor kernel and see if anything extra is poked when the Mali driver is loaded. Steve