On Wed, Jun 26, 2019 at 06:20:09PM +0800, Lowry Li (Arm Technology China) wrote:
> Adds to support register dump on lpu and dou of pipeline and gcu on D71
> 
> Signed-off-by: Lowry Li (Arm Technology China) <lowry...@arm.com>
> ---
>  .../gpu/drm/arm/display/komeda/d71/d71_component.c | 86 
> +++++++++++++++++++++-
>  drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c   | 23 +++---
>  drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h   |  2 +
>  drivers/gpu/drm/arm/display/komeda/komeda_dev.c    |  2 +
>  4 files changed, 101 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 
> b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> index ecec6ce..ed3f273 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> @@ -1253,6 +1253,90 @@ int d71_probe_block(struct d71_dev *d71,
>       return err;
>  }
>  
> +static void d71_gcu_dump(struct d71_dev *d71, struct seq_file *sf)
> +{
> +     u32 v[5];
> +
> +     seq_printf(sf, "\n------ GCU ------\n");
> +
> +     get_values_from_reg(d71->gcu_addr, 0, 3, v);
> +     seq_printf(sf, "GLB_ARCH_ID:\t\t0x%X\n", v[0]);
> +     seq_printf(sf, "GLB_CORE_ID:\t\t0x%X\n", v[1]);
> +     seq_printf(sf, "GLB_CORE_INFO:\t\t0x%X\n", v[2]);
> +
> +     get_values_from_reg(d71->gcu_addr, 0x10, 1, v);
> +     seq_printf(sf, "GLB_IRQ_STATUS:\t\t0x%X\n", v[0]);
> +
> +     get_values_from_reg(d71->gcu_addr, 0xA0, 5, v);
> +     seq_printf(sf, "GCU_IRQ_RAW_STATUS:\t0x%X\n", v[0]);
> +     seq_printf(sf, "GCU_IRQ_CLEAR:\t\t0x%X\n", v[1]);
> +     seq_printf(sf, "GCU_IRQ_MASK:\t\t0x%X\n", v[2]);
> +     seq_printf(sf, "GCU_IRQ_STATUS:\t\t0x%X\n", v[3]);
> +     seq_printf(sf, "GCU_STATUS:\t\t0x%X\n", v[4]);
> +
> +     get_values_from_reg(d71->gcu_addr, 0xD0, 3, v);
> +     seq_printf(sf, "GCU_CONTROL:\t\t0x%X\n", v[0]);
> +     seq_printf(sf, "GCU_CONFIG_VALID0:\t0x%X\n", v[1]);
> +     seq_printf(sf, "GCU_CONFIG_VALID1:\t0x%X\n", v[2]);
> +}
> +
> +static void d71_lpu_dump(struct d71_pipeline *pipe, struct seq_file *sf)
> +{
> +     u32 v[6];
> +
> +     seq_printf(sf, "\n------ LPU%d ------\n", pipe->base.id);
> +
> +     dump_block_header(sf, pipe->lpu_addr);
> +
> +     get_values_from_reg(pipe->lpu_addr, 0xA0, 6, v);
> +     seq_printf(sf, "LPU_IRQ_RAW_STATUS:\t0x%X\n", v[0]);
> +     seq_printf(sf, "LPU_IRQ_CLEAR:\t\t0x%X\n", v[1]);
> +     seq_printf(sf, "LPU_IRQ_MASK:\t\t0x%X\n", v[2]);
> +     seq_printf(sf, "LPU_IRQ_STATUS:\t\t0x%X\n", v[3]);
> +     seq_printf(sf, "LPU_STATUS:\t\t0x%X\n", v[4]);
> +     seq_printf(sf, "LPU_TBU_STATUS:\t\t0x%X\n", v[5]);
> +
> +     get_values_from_reg(pipe->lpu_addr, 0xC0, 1, v);
> +     seq_printf(sf, "LPU_INFO:\t\t0x%X\n", v[0]);
> +
> +     get_values_from_reg(pipe->lpu_addr, 0xD0, 3, v);
> +     seq_printf(sf, "LPU_RAXI_CONTROL:\t0x%X\n", v[0]);
> +     seq_printf(sf, "LPU_WAXI_CONTROL:\t0x%X\n", v[1]);
> +     seq_printf(sf, "LPU_TBU_CONTROL:\t0x%X\n", v[2]);
> +}
> +
> +static void d71_dou_dump(struct d71_pipeline *pipe, struct seq_file *sf)
> +{
> +     u32 v[5];
> +
> +     seq_printf(sf, "\n------ DOU%d ------\n", pipe->base.id);
> +
> +     dump_block_header(sf, pipe->dou_addr);
> +
> +     get_values_from_reg(pipe->dou_addr, 0xA0, 5, v);
> +     seq_printf(sf, "DOU_IRQ_RAW_STATUS:\t0x%X\n", v[0]);
> +     seq_printf(sf, "DOU_IRQ_CLEAR:\t\t0x%X\n", v[1]);
> +     seq_printf(sf, "DOU_IRQ_MASK:\t\t0x%X\n", v[2]);
> +     seq_printf(sf, "DOU_IRQ_STATUS:\t\t0x%X\n", v[3]);
> +     seq_printf(sf, "DOU_STATUS:\t\t0x%X\n", v[4]);
> +}
> +
> +static void d71_pipeline_dump(struct komeda_pipeline *pipe, struct seq_file 
> *sf)
> +{
> +     struct d71_pipeline *d71_pipe = to_d71_pipeline(pipe);
> +
> +     d71_lpu_dump(d71_pipe, sf);
> +     d71_dou_dump(d71_pipe, sf);
> +}
> +
>  const struct komeda_pipeline_funcs d71_pipeline_funcs = {
> -     .downscaling_clk_check = d71_downscaling_clk_check,
> +     .downscaling_clk_check  = d71_downscaling_clk_check,
> +     .dump_register          = d71_pipeline_dump,
>  };
> +
> +void d71_dump(struct komeda_dev *mdev, struct seq_file *sf)
> +{
> +     struct d71_dev *d71 = mdev->chip_data;
> +
> +     d71_gcu_dump(d71, sf);
> +}
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 
> b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> index caaa2b2..7e7c9e9 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> @@ -561,17 +561,18 @@ static int d71_disconnect_iommu(struct komeda_dev *mdev)
>  }
>  
>  static const struct komeda_dev_funcs d71_chip_funcs = {
> -     .init_format_table = d71_init_fmt_tbl,
> -     .enum_resources = d71_enum_resources,
> -     .cleanup        = d71_cleanup,
> -     .irq_handler    = d71_irq_handler,
> -     .enable_irq     = d71_enable_irq,
> -     .disable_irq    = d71_disable_irq,
> -     .on_off_vblank  = d71_on_off_vblank,
> -     .change_opmode  = d71_change_opmode,
> -     .flush          = d71_flush,
> -     .connect_iommu  = d71_connect_iommu,
> -     .disconnect_iommu = d71_disconnect_iommu,
> +     .init_format_table      = d71_init_fmt_tbl,
> +     .enum_resources         = d71_enum_resources,
> +     .cleanup                = d71_cleanup,
> +     .irq_handler            = d71_irq_handler,
> +     .enable_irq             = d71_enable_irq,
> +     .disable_irq            = d71_disable_irq,
> +     .on_off_vblank          = d71_on_off_vblank,
> +     .change_opmode          = d71_change_opmode,
> +     .flush                  = d71_flush,
> +     .connect_iommu          = d71_connect_iommu,
> +     .disconnect_iommu       = d71_disconnect_iommu,
> +     .dump_register          = d71_dump,
>  };
>  
>  const struct komeda_dev_funcs *
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h 
> b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h
> index 84f1878..c7357c2 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h
> @@ -49,4 +49,6 @@ int d71_probe_block(struct d71_dev *d71,
>                   struct block_header *blk, u32 __iomem *reg);
>  void d71_read_block_header(u32 __iomem *reg, struct block_header *blk);
>  
> +void d71_dump(struct komeda_dev *mdev, struct seq_file *sf);
> +
>  #endif /* !_D71_DEV_H_ */
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c 
> b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
> index 4218d6e..85b8604 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
> @@ -23,6 +23,8 @@ static int komeda_register_show(struct seq_file *sf, void 
> *x)
>       struct komeda_dev *mdev = sf->private;
>       int i;
>  
> +     seq_printf(sf, "\n====== Komeda register dump =========\n");
> +
>       if (mdev->funcs->dump_register)
>               mdev->funcs->dump_register(mdev, sf);
>  
> -- 
> 1.9.1
> 

Looks good to me.

Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.w...@arm.com>

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