Add documentation for new optional properties in the exynos bus nodes: samsung,interconnect-parent, #interconnect-cells. These properties allow to specify the SoC interconnect structure which then allows the interconnect consumer devices to request specific bandwidth requirements.
Signed-off-by: Artur Świgoń <a.swi...@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawro...@samsung.com> --- Changes for v5: - exynos,interconnect-parent-node renamed to samsung,interconnect-parent --- Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt index e71f752..e0d2daa 100644 --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt @@ -51,6 +51,11 @@ Optional properties only for parent bus device: - exynos,saturation-ratio: the percentage value which is used to calibrate the performance count against total cycle count. +Optional properties for interconnect functionality (QoS frequency constraints): +- samsung,interconnect-parent: phandle to the parent interconnect node; for + passive devices should point to same node as the exynos,parent-bus property. +- #interconnect-cells: should be 0 + Detailed correlation between sub-blocks and power line according to Exynos SoC: - In case of Exynos3250, there are two power line as following: VDD_MIF |--- DMC @@ -185,8 +190,9 @@ Example1: ---------------------------------------------------------- Example2 : - The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi - is listed below: + The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is + listed below. An interconnect path "bus_lcd0 -- bus_leftbus -- bus_dmc" + is defined for demonstration purposes. bus_dmc: bus_dmc { compatible = "samsung,exynos-bus"; @@ -376,12 +382,15 @@ Example2 : &bus_dmc { devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; vdd-supply = <&buck1_reg>; /* VDD_MIF */ + #interconnect-cells = <0>; status = "okay"; }; &bus_leftbus { devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; vdd-supply = <&buck3_reg>; + samsung,interconnect-parent = <&bus_dmc>; + #interconnect-cells = <0>; status = "okay"; }; @@ -392,6 +401,8 @@ Example2 : &bus_lcd0 { devfreq = <&bus_leftbus>; + samsung,interconnect-parent = <&bus_leftbus>; + #interconnect-cells = <0>; status = "okay"; }; -- 2.7.4 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel