Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.

Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <m...@chromium.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 59 ++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi 
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index fee50d9..3efdd70 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3296,6 +3296,35 @@
                        #power-domain-cells = <1>;
                };
 
+               dsi_opp_table: dsi-opp-table {
+                       compatible = "operating-points-v2";
+
+                       opp-19200000 {
+                               opp-hz = /bits/ 64 <19200000>;
+                               required-opps = <&rpmhpd_opp_min_svs>;
+                       };
+
+                       opp-180000000 {
+                               opp-hz = /bits/ 64 <180000000>;
+                               required-opps = <&rpmhpd_opp_low_svs>;
+                       };
+
+                       opp-275000000 {
+                               opp-hz = /bits/ 64 <275000000>;
+                               required-opps = <&rpmhpd_opp_svs>;
+                       };
+
+                       opp-328580000 {
+                               opp-hz = /bits/ 64 <328580000>;
+                               required-opps = <&rpmhpd_opp_svs_l1>;
+                       };
+
+                       opp-358000000 {
+                               opp-hz = /bits/ 64 <358000000>;
+                               required-opps = <&rpmhpd_opp_nom>;
+                       };
+               };
+
                mdss: mdss@ae00000 {
                        compatible = "qcom,sdm845-mdss";
                        reg = <0 0x0ae00000 0 0x1000>;
@@ -3340,6 +3369,8 @@
                                                  <&dispcc 
DISP_CC_MDSS_VSYNC_CLK>;
                                assigned-clock-rates = <300000000>,
                                                       <19200000>;
+                               operating-points-v2 = <&mdp_opp_table>;
+                               power-domains = <&rpmhpd SDM845_CX>;
 
                                interrupt-parent = <&mdss>;
                                interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
@@ -3364,6 +3395,30 @@
                                                };
                                        };
                                };
+
+                               mdp_opp_table: mdp-opp-table {
+                                       compatible = "operating-points-v2";
+
+                                       opp-19200000 {
+                                               opp-hz = /bits/ 64 <19200000>;
+                                               required-opps = 
<&rpmhpd_opp_min_svs>;
+                                       };
+
+                                       opp-171428571 {
+                                               opp-hz = /bits/ 64 <171428571>;
+                                               required-opps = 
<&rpmhpd_opp_low_svs>;
+                                       };
+
+                                       opp-344000000 {
+                                               opp-hz = /bits/ 64 <344000000>;
+                                               required-opps = 
<&rpmhpd_opp_svs_l1>;
+                                       };
+
+                                       opp-430000000 {
+                                               opp-hz = /bits/ 64 <430000000>;
+                                               required-opps = 
<&rpmhpd_opp_nom>;
+                                       };
+                               };
                        };
 
                        dsi0: dsi@ae94000 {
@@ -3386,6 +3441,8 @@
                                              "core",
                                              "iface",
                                              "bus";
+                               operating-points-v2 = <&dsi_opp_table>;
+                               power-domains = <&rpmhpd SDM845_CX>;
 
                                phys = <&dsi0_phy>;
                                phy-names = "dsi";
@@ -3450,6 +3507,8 @@
                                              "core",
                                              "iface",
                                              "bus";
+                               operating-points-v2 = <&dsi_opp_table>;
+                               power-domains = <&rpmhpd SDM845_CX>;
 
                                phys = <&dsi1_phy>;
                                phy-names = "dsi";
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

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