On 13/02/2021 10:15, Mikko Perttunen wrote:
> Add support for booting and using NVDEC on Tegra210, Tegra186
> and Tegra194 to the Host1x and TegraDRM drivers. Booting in
> secure mode is not currently supported.
>
> Signed-off-by: Mikko Perttunen <mperttu...@nvidia.com>
> ---
> drivers/gpu/drm/tegra/Makefile | 3 +-
> drivers/gpu/drm/tegra/drm.c | 4 +
> drivers/gpu/drm/tegra/drm.h | 1 +
> drivers/gpu/drm/tegra/nvdec.c | 497 +++++++++++++++++++++++++++++++++
> drivers/gpu/host1x/dev.c | 12 +
> include/linux/host1x.h | 1 +
> 6 files changed, 517 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/tegra/nvdec.c
...
> +static int nvdec_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct host1x_syncpt **syncpts;
> + struct resource *regs;
> + struct nvdec *nvdec;
> + int err;
> +
> + /* inherit DMA mask from host1x parent */
> + err = dma_coerce_mask_and_coherent(dev, *dev->parent->dma_mask);
> + if (err < 0) {
> + dev_err(&pdev->dev, "failed to set DMA mask: %d\n", err);
> + return err;
> + }
> +
> + nvdec = devm_kzalloc(dev, sizeof(*nvdec), GFP_KERNEL);
> + if (!nvdec)
> + return -ENOMEM;
> +
> + nvdec->config = of_device_get_match_data(dev);
> +
> + syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
> + if (!syncpts)
> + return -ENOMEM;
> +
> + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!regs) {
> + dev_err(&pdev->dev, "failed to get registers\n");
> + return -ENXIO;
> + }
> +
> + nvdec->regs = devm_ioremap_resource(dev, regs);
> + if (IS_ERR(nvdec->regs))
> + return PTR_ERR(nvdec->regs);
> +
We should be able to use devm_platform_get_and_ioremap_resource() here.
> + nvdec->clk = devm_clk_get(dev, NULL);
> + if (IS_ERR(nvdec->clk)) {
> + dev_err(&pdev->dev, "failed to get clock\n");
> + return PTR_ERR(nvdec->clk);
> + }
> +
> + if (!dev->pm_domain) {
Looks like the power-domain is required by device-tree and so do we need
this?
> + nvdec->rst = devm_reset_control_get(dev, "nvdec");
> + if (IS_ERR(nvdec->rst)) {
> + dev_err(&pdev->dev, "failed to get reset\n");
> + return PTR_ERR(nvdec->rst);
> + }
> + }
> +
> + nvdec->falcon.dev = dev;
> + nvdec->falcon.regs = nvdec->regs;
> +
> + err = falcon_init(&nvdec->falcon);
> + if (err < 0)
> + return err;
> +
> + platform_set_drvdata(pdev, nvdec);
> +
> + INIT_LIST_HEAD(&nvdec->client.base.list);
> + nvdec->client.base.ops = &nvdec_client_ops;
> + nvdec->client.base.dev = dev;
> + nvdec->client.base.class = HOST1X_CLASS_NVDEC;
> + nvdec->client.base.syncpts = syncpts;
> + nvdec->client.base.num_syncpts = 1;
> + nvdec->dev = dev;
> +
> + INIT_LIST_HEAD(&nvdec->client.list);
> + nvdec->client.version = nvdec->config->version;
> + nvdec->client.ops = &nvdec_ops;
> +
> + err = host1x_client_register(&nvdec->client.base);
> + if (err < 0) {
> + dev_err(dev, "failed to register host1x client: %d\n", err);
> + goto exit_falcon;
> + }
> +
> + pm_runtime_enable(&pdev->dev);
> + if (!pm_runtime_enabled(&pdev->dev)) {
> + err = nvdec_runtime_resume(&pdev->dev);
> + if (err < 0)
> + goto unregister_client;
> + }
pm_runtime should always be enabled for 64-bit Tegra and so we should
not need to check pm_runtime_enabled().
Cheers
Jon
--
nvpublic
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