Xe_HPG adds some additional INSTDONE_GEOM debug registers; the Mesa team
has indicated that having these reported in the error state would be
useful for debugging GPU hangs.  These registers are replicated per-DSS
with gslice steering.

Cc: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c    |  7 +++++++
 drivers/gpu/drm/i915/gt/intel_engine_types.h |  3 +++
 drivers/gpu/drm/i915/i915_gpu_error.c        | 10 ++++++++--
 drivers/gpu/drm/i915/i915_reg.h              |  1 +
 4 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index e1302e9c168b..b3c002e4ae9f 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1220,6 +1220,13 @@ void intel_engine_get_instdone(const struct 
intel_engine_cs *engine,
                                                          GEN7_ROW_INSTDONE);
                        }
                }
+
+               if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) {
+                       for_each_instdone_gslice_dss_xehp(i915, sseu, iter, 
slice, subslice)
+                               instdone->geom_svg[slice][subslice] =
+                                       read_subslice_reg(engine, slice, 
subslice,
+                                                         
XEHPG_INSTDONE_GEOM_SVG);
+               }
        } else if (GRAPHICS_VER(i915) >= 7) {
                instdone->instdone =
                        intel_uncore_read(uncore, RING_INSTDONE(mmio_base));
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h 
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index e917b7519f2b..93609d797ac2 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -80,6 +80,9 @@ struct intel_instdone {
        u32 slice_common_extra[2];
        u32 sampler[GEN_MAX_GSLICES][I915_MAX_SUBSLICES];
        u32 row[GEN_MAX_GSLICES][I915_MAX_SUBSLICES];
+
+       /* Added in XeHPG */
+       u32 geom_svg[GEN_MAX_GSLICES][I915_MAX_SUBSLICES];
 };
 
 /*
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index c1e744b5ab47..4de7edc451ef 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -431,6 +431,7 @@ static void error_print_instdone(struct 
drm_i915_error_state_buf *m,
        const struct sseu_dev_info *sseu = &ee->engine->gt->info.sseu;
        int slice;
        int subslice;
+       int iter;
 
        err_printf(m, "  INSTDONE: 0x%08x\n",
                   ee->instdone.instdone);
@@ -445,8 +446,6 @@ static void error_print_instdone(struct 
drm_i915_error_state_buf *m,
                return;
 
        if (GRAPHICS_VER_FULL(m->i915) >= IP_VER(12, 50)) {
-               int iter;
-
                for_each_instdone_gslice_dss_xehp(m->i915, sseu, iter, slice, 
subslice)
                        err_printf(m, "  SAMPLER_INSTDONE[%d][%d]: 0x%08x\n",
                                   slice, subslice,
@@ -471,6 +470,13 @@ static void error_print_instdone(struct 
drm_i915_error_state_buf *m,
        if (GRAPHICS_VER(m->i915) < 12)
                return;
 
+       if (GRAPHICS_VER_FULL(m->i915) >= IP_VER(12, 55)) {
+               for_each_instdone_gslice_dss_xehp(m->i915, sseu, iter, slice, 
subslice)
+                       err_printf(m, "  GEOM_SVGUNIT_INSTDONE[%d][%d]: 
0x%08x\n",
+                                  slice, subslice,
+                                  ee->instdone.geom_svg[slice][subslice]);
+       }
+
        err_printf(m, "  SC_INSTDONE_EXTRA: 0x%08x\n",
                   ee->instdone.slice_common_extra[0]);
        err_printf(m, "  SC_INSTDONE_EXTRA2: 0x%08x\n",
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 35a42df1f2aa..d58864c7adc6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2686,6 +2686,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GEN12_SC_INSTDONE_EXTRA2       _MMIO(0x7108)
 #define GEN7_SAMPLER_INSTDONE  _MMIO(0xe160)
 #define GEN7_ROW_INSTDONE      _MMIO(0xe164)
+#define XEHPG_INSTDONE_GEOM_SVG                _MMIO(0x666c)
 #define MCFG_MCR_SELECTOR              _MMIO(0xfd0)
 #define SF_MCR_SELECTOR                        _MMIO(0xfd8)
 #define GEN8_MCR_SELECTOR              _MMIO(0xfdc)
-- 
2.25.4

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