On Fri, Sep 10, 2021 at 01:10:30PM -0700, Matt Roper wrote:
We thought the DG2 table of shadowed registers would be the same as the
gen12/xehp table, but it turns out that there are a few minor
differences that require us to define a new DG2-specific table:
* One register is removed (0xC4D4)
* One register is added (0xC4E0)
Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
I did the conversion from the table to this array and arrived at the
same result.
Reviewed-by: Lucas De Marchi <lucas.demar...@intel.com>
Lucas De Marchi
