On Wed, Dec 29, 2021 at 10:19 PM Charles Stevens <chaz...@yahoo.com> wrote: > > > Hi All, > I am working on a platform based on the Renesas RZ/G2 SoC family. This > chip uses the rcar-du driver for the display. I would like to submit a patch > to address the fact that the driver does not check/honor the flag > DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE. My issue is that I would like to make as > small a change to the driver as possible, but the panel bus_flags don't seem > to even make it to the crtc driver. The crtc driver seems to use > adjusted_mode to set the HSYNC and VSYNC polarity and as I said ignores the > pixel clock polarity leaving it at the default of driving on the falling > edge. In my investigations so far I have not figured out how to chase the > pointers from the CRTC to the bridge to the panel in order to be able to look > at bus_flags. My current approach also modifies the encoder initialization to > cache the needed panel and then find the attached encoder during CRTC > initialization to find the bus flags. This seems like a lot of work and not > something that would be accepted as a patch. The OMAP DSS seems to have > problems accessing this flag as well. The TI driver goes so far as to > document the current approach as a HACK and suggest a fairly large change to > the driver to address the problem. Am I missing something? Is there an easy > way to get from a drm_crtc to a drm_panel that is in the same pipeline? > > Any pointers would be greatly appreciated! + Laurent, Kieran
Charles, I added Laurent and Kieran because they appear as the maintainers for the rcar-du driver. adam > > Thanks! > > -charles
