Am Freitag, dem 18.02.2022 um 02:00 +0100 schrieb Marek Vasut:
> The tc_set_video_mode() sets up both common and (e)DP video mode settings of
> the bridge chip. Split the function into tc_set_common_video_mode() to set
> the common settings and tc_set_edp_video_mode() to set the (e)DP specific
> settings. No functional change.
>
> Signed-off-by: Marek Vasut <ma...@denx.de>
> Cc: Jonas Karlman <jo...@kwiboo.se>
> Cc: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
> Cc: Maxime Ripard <max...@cerno.tech>
> Cc: Neil Armstrong <narmstr...@baylibre.com>
> Cc: Sam Ravnborg <s...@ravnborg.org>
Reviewed-by: Lucas Stach <l.st...@pengutronix.de>
> ---
> V2: - New patch
> ---
> drivers/gpu/drm/bridge/tc358767.c | 48 ++++++++++++++++++++++++-------
> 1 file changed, 37 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/tc358767.c
> b/drivers/gpu/drm/bridge/tc358767.c
> index 4af0ad5db2148..091c969a36ab7 100644
> --- a/drivers/gpu/drm/bridge/tc358767.c
> +++ b/drivers/gpu/drm/bridge/tc358767.c
> @@ -734,11 +734,10 @@ static int tc_get_display_props(struct tc_data *tc)
> return ret;
> }
>
> -static int tc_set_video_mode(struct tc_data *tc,
> - const struct drm_display_mode *mode)
> +static int tc_set_common_video_mode(struct tc_data *tc,
> + const struct drm_display_mode *mode)
> {
> int ret;
> - int vid_sync_dly;
> int max_tu_symbol;
>
> int left_margin = mode->htotal - mode->hsync_end;
> @@ -747,7 +746,6 @@ static int tc_set_video_mode(struct tc_data *tc,
> int upper_margin = mode->vtotal - mode->vsync_end;
> int lower_margin = mode->vsync_start - mode->vdisplay;
> int vsync_len = mode->vsync_end - mode->vsync_start;
> - u32 dp0_syncval;
> u32 bits_per_pixel = 24;
> u32 in_bw, out_bw;
>
> @@ -818,8 +816,35 @@ static int tc_set_video_mode(struct tc_data *tc,
> FIELD_PREP(COLOR_B, 99) |
> ENI2CFILTER |
> FIELD_PREP(COLOR_BAR_MODE, COLOR_BAR_MODE_BARS));
> - if (ret)
> - return ret;
> +
> + return ret;
> +}
> +
> +static int tc_set_edp_video_mode(struct tc_data *tc,
> + const struct drm_display_mode *mode)
> +{
> + int ret;
> + int vid_sync_dly;
> + int max_tu_symbol;
> +
> + int left_margin = mode->htotal - mode->hsync_end;
> + int hsync_len = mode->hsync_end - mode->hsync_start;
> + int upper_margin = mode->vtotal - mode->vsync_end;
> + int vsync_len = mode->vsync_end - mode->vsync_start;
> + u32 dp0_syncval;
> + u32 bits_per_pixel = 24;
> + u32 in_bw, out_bw;
> +
> + /*
> + * Recommended maximum number of symbols transferred in a transfer unit:
> + * DIV_ROUND_UP((input active video bandwidth in bytes) * tu_size,
> + * (output active video bandwidth in bytes))
> + * Must be less than tu_size.
> + */
> +
> + in_bw = mode->clock * bits_per_pixel / 8;
> + out_bw = tc->link.num_lanes * tc->link.rate;
> + max_tu_symbol = DIV_ROUND_UP(in_bw * TU_SIZE_RECOMMENDED, out_bw);
>
> /* DP Main Stream Attributes */
> vid_sync_dly = hsync_len + left_margin + mode->hdisplay;
> @@ -869,10 +894,7 @@ static int tc_set_video_mode(struct tc_data *tc,
> FIELD_PREP(MAX_TU_SYMBOL, max_tu_symbol) |
> FIELD_PREP(TU_SIZE, TU_SIZE_RECOMMENDED) |
> BPC_8);
> - if (ret)
> - return ret;
> -
> - return 0;
> + return ret;
> }
>
> static int tc_wait_link_training(struct tc_data *tc)
> @@ -1185,7 +1207,11 @@ static int tc_edp_stream_enable(struct tc_data *tc)
> return ret;
> }
>
> - ret = tc_set_video_mode(tc, &tc->mode);
> + ret = tc_set_common_video_mode(tc, &tc->mode);
> + if (ret)
> + return ret;
> +
> + ret = tc_set_edp_video_mode(tc, &tc->mode);
> if (ret)
> return ret;
>
