[PATCH v7 20/24] arm64: dts: rockchip: enable vop2 and hdmi tx on quartz64a

[Sascha Hauer]

From: Michael Riesch <michael.rie...@wolfvision.net>

Enable the RK356x Video Output Processor (VOP) 2 on the Pine64
Quartz64 Model A.

Signed-off-by: Michael Riesch <michael.rie...@wolfvision.net>
Signed-off-by: Sascha Hauer <s.ha...@pengutronix.de>
---

Notes:
    Changes since v5:
    - Drop reg property from single endpoint node
    
    Changes since v4:
    - Sort nodes alphabetically
    
    Changes since v3:
    - Fix HDMI connector type

 .../boot/dts/rockchip/rk3566-quartz64-a.dts   | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts 
b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index 166399b7f13f0..ddb7857bef099 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -4,6 +4,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
 #include "rk3566.dtsi"
 
 / {
@@ -35,6 +36,17 @@ fan: gpio_fan {
                #cooling-cells = <2>;
        };
 
+       hdmi-con {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+
        leds {
                compatible = "gpio-leds";
 
@@ -205,6 +217,24 @@ &gmac1m0_clkinout
        status = "okay";
 };
 
+&hdmi {
+       avdd-0v9-supply = <&vdda_0v9>;
+       avdd-1v8-supply = <&vcc_1v8>;
+       status = "okay";
+};
+
+&hdmi_in {
+       hdmi_in_vp0: endpoint {
+               remote-endpoint = <&vp0_out_hdmi>;
+       };
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
 &i2c0 {
        status = "okay";
 
@@ -551,3 +581,20 @@ bluetooth {
 &uart2 {
        status = "okay";
 };
+
+&vop {
+       assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+       assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+       status = "okay";
+};
+
+&vop_mmu {
+       status = "okay";
+};
+
+&vp0 {
+       vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+               reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+               remote-endpoint = <&hdmi_in_vp0>;
+       };
+};
-- 
2.30.2