On 2022-03-03 12:25, Gustavo A. R. Silva wrote:
> Fix the following Wstringop-overflow warnings when building with GCC-11:
> 
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dpia.c:493:17: warning: 
> ‘dp_decide_lane_settings’ accessing 4 bytes in a region of size 1 
> [-Wstringop-overflow=]
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dpia.c:493:17: warning: 
> ‘dp_decide_lane_settings’ accessing 4 bytes in a region of size 1 
> [-Wstringop-overflow=]
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dpia.c:493:17: warning: 
> ‘dp_decide_lane_settings’ accessing 4 bytes in a region of size 1 
> [-Wstringop-overflow=]
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dpia.c:388:17: warning: 
> ‘dp_decide_lane_settings’ accessing 4 bytes in a region of size 1 
> [-Wstringop-overflow=]
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dpia.c:388:17: warning: 
> ‘dp_decide_lane_settings’ accessing 4 bytes in a region of size 1 
> [-Wstringop-overflow=]
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dpia.c:388:17: warning: 
> ‘dp_decide_lane_settings’ accessing 4 bytes in a region of size 1 
> [-Wstringop-overflow=]
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:1491:17: warning: 
> ‘dp_decide_lane_settings’ accessing 4 bytes in a region of size 1 
> [-Wstringop-overflow=]
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:2613:25: warning: 
> ‘dp_decide_lane_settings’ accessing 4 bytes in a region of size 1 
> [-Wstringop-overflow=]
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:2613:25: warning: 
> ‘dp_decide_lane_settings’ accessing 4 bytes in a region of size 1 
> [-Wstringop-overflow=]
> 
> by removing the over-specified array size from the argument declarations.
> 
> This helps with the ongoing efforts to globally enable
> -Wstringop-overflow.
> 
> Link: https://github.com/KSPP/linux/issues/181>> Signed-off-by: Gustavo A. R. 
> Silva <gustavo...@kernel.org>

Acked-by: Harry Wentland <harry.wentl...@amd.com>

Harry

> ---
>  drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 ++--
>  drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h  | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 
> b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> index f11a8d97fb60..81952e07acf6 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> @@ -823,7 +823,7 @@ bool dp_is_interlane_aligned(union 
> lane_align_status_updated align_status)
>  void dp_hw_to_dpcd_lane_settings(
>               const struct link_training_settings *lt_settings,
>               const struct dc_lane_settings 
> hw_lane_settings[LANE_COUNT_DP_MAX],
> -             union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX])
> +             union dpcd_training_lane dpcd_lane_settings[])
>  {
>       uint8_t lane = 0;
>  
> @@ -853,7 +853,7 @@ void dp_decide_lane_settings(
>               const struct link_training_settings *lt_settings,
>               const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
>               struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
> -             union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX])
> +             union dpcd_training_lane dpcd_lane_settings[])
>  {
>       uint32_t lane;
>  
> diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h 
> b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
> index ab9939db8cea..0d00da1640a7 100644
> --- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
> +++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
> @@ -147,12 +147,12 @@ bool dp_is_max_vs_reached(
>  void dp_hw_to_dpcd_lane_settings(
>       const struct link_training_settings *lt_settings,
>       const struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
> -     union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX]);
> +     union dpcd_training_lane dpcd_lane_settings[]);
>  void dp_decide_lane_settings(
>       const struct link_training_settings *lt_settings,
>       const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
>       struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
> -     union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX]);
> +     union dpcd_training_lane dpcd_lane_settings[]);
>  
>  uint32_t dp_translate_training_aux_read_interval(uint32_t 
> dpcd_aux_read_interval);
>  

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