Read out the Vendor/Chip/Version ID registers from the chip before
performing any configuration, and validate that the registers have
correct values. This is mostly a simple test whether DSI register
access does work, since that tends to be broken on various bridges.

Acked-by: Maxime Ripard <max...@cerno.tech>
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Jagan Teki <ja...@amarulasolutions.com>
Cc: Maxime Ripard <max...@cerno.tech>
Cc: Robert Foss <robert.f...@linaro.org>
Cc: Sam Ravnborg <s...@ravnborg.org>
Cc: Thomas Zimmermann <tzimmerm...@suse.de>
To: dri-devel@lists.freedesktop.org
---
V2: Rebase on next-20220214
V3: Add AB from Maxime
V4: No change
V5: No change
---
 drivers/gpu/drm/bridge/chipone-icn6211.c | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c 
b/drivers/gpu/drm/bridge/chipone-icn6211.c
index 7c6dc25082964..0cd2c32dbdb32 100644
--- a/drivers/gpu/drm/bridge/chipone-icn6211.c
+++ b/drivers/gpu/drm/bridge/chipone-icn6211.c
@@ -151,6 +151,14 @@ static inline struct chipone *bridge_to_chipone(struct 
drm_bridge *bridge)
        return container_of(bridge, struct chipone, bridge);
 }
 
+static void chipone_readb(struct chipone *icn, u8 reg, u8 *val)
+{
+       if (icn->interface_i2c)
+               *val = i2c_smbus_read_byte_data(icn->client, reg);
+       else
+               mipi_dsi_generic_read(icn->dsi, (u8[]){reg, 1}, 2, val, 1);
+}
+
 static int chipone_writeb(struct chipone *icn, u8 reg, u8 val)
 {
        if (icn->interface_i2c)
@@ -249,7 +257,21 @@ static void chipone_atomic_enable(struct drm_bridge 
*bridge,
        const struct drm_bridge_state *bridge_state;
        u16 hfp, hbp, hsync;
        u32 bus_flags;
-       u8 pol;
+       u8 pol, id[4];
+
+       chipone_readb(icn, VENDOR_ID, id);
+       chipone_readb(icn, DEVICE_ID_H, id + 1);
+       chipone_readb(icn, DEVICE_ID_L, id + 2);
+       chipone_readb(icn, VERSION_ID, id + 3);
+
+       dev_dbg(icn->dev,
+               "Chip IDs: Vendor=0x%02x Device=0x%02x:0x%02x Version=0x%02x\n",
+               id[0], id[1], id[2], id[3]);
+
+       if (id[0] != 0xc1 || id[1] != 0x62 || id[2] != 0x11) {
+               dev_dbg(icn->dev, "Invalid Chip IDs, aborting configuration\n");
+               return;
+       }
 
        /* Get the DPI flags from the bridge state. */
        bridge_state = drm_atomic_get_new_bridge_state(state, bridge);
-- 
2.35.1

Reply via email to