Hi Mauro,
On Wed, Jun 15, 2022 at 04:27:39PM +0100, Mauro Carvalho Chehab wrote:
> From: Chris Wilson <chris.p.wil...@intel.com>
>
> Don't allow two engines to be reset in parallel, as they would both
> try to select a reset bit (and send requests to common registers)
> and wait on that register, at the same time. Serialize control of
> the reset requests/acks using the uncore->lock, which will also ensure
> that no other GT state changes at the same time as the actual reset.
>
> Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
>
> Reported-by: Mika Kuoppala <mika.kuopp...@linux.intel.com>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
> Cc: Andi Shyti <andi.sh...@intel.com>
> Cc: sta...@vger.kernel.org
> Acked-by: Thomas Hellström <thomas.hellst...@linux.intel.com>
> Signed-off-by: Mauro Carvalho Chehab <mche...@kernel.org>
Reviewed-by: Andi Shyti <andi.sh...@linux.intel.com>
Thanks,
Andi
