Hi Mauro,
On Thu, Jul 14, 2022 at 01:06:10PM +0100, Mauro Carvalho Chehab wrote:
> From: Chris Wilson <chris.p.wil...@intel.com>
>
> Skip all further TLB invalidations once the device is wedged and
> had been reset, as, on such cases, it can no longer process instructions
> on the GPU and the user no longer has access to the TLB's in each engine.
>
> That helps to reduce the performance regression introduced by TLB
> invalidate logic.
>
> Cc: sta...@vger.kernel.org
> Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
> Signed-off-by: Chris Wilson <chris.p.wil...@intel.com>
> Cc: Fei Yang <fei.y...@intel.com>
> Cc: Andi Shyti <andi.sh...@linux.intel.com>
> Acked-by: Thomas Hellström <thomas.hellst...@linux.intel.com>
> Signed-off-by: Mauro Carvalho Chehab <mche...@kernel.org>
I haven't read any concern from Tvrtko here, in any case:
Reviewed-by: Andi Shyti <andi.sh...@linux.intel.com>
thanks,
Andi
