On 2022-09-24 15:19:00, Dmitry Baryshkov wrote:
> From: Loic Poulain <loic.poul...@linaro.org>
>
> The QCM2290 SoC a the 14nm (V2.0) single DSI phy. The platform is not
> fully compatible with the standard 14nm PHY, so it requires a separate
> compatible and config entry.
>
> Signed-off-by: Loic Poulain <loic.poul...@linaro.org>
> [DB: rebased and updated commit msg]
> Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
> ---
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
> drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 17 +++++++++++++++++
> 3 files changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> index 7fc0975cb869..ee6051367679 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> @@ -549,6 +549,8 @@ static const struct of_device_id dsi_phy_dt_match[] = {
> #ifdef CONFIG_DRM_MSM_DSI_14NM_PHY
> { .compatible = "qcom,dsi-phy-14nm",
> .data = &dsi_phy_14nm_cfgs },
> + { .compatible = "qcom,dsi-phy-14nm-2290",
> + .data = &dsi_phy_14nm_2290_cfgs },
> { .compatible = "qcom,dsi-phy-14nm-660",
> .data = &dsi_phy_14nm_660_cfgs },
> { .compatible = "qcom,dsi-phy-14nm-8953",
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> index 60a99c6525b2..1096afedd616 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> @@ -50,6 +50,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs;
> extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs;
> extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs;
> extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs;
> +extern const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs;
following alphabetical sorting (same as the other locations in this
series), this should be above 660?
> extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs;
> extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;
> extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> index 0f8f4ca46429..9f488adea7f5 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> @@ -1081,3 +1081,20 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs = {
> .io_start = { 0x1a94400, 0x1a96400 },
> .num_dsi_phy = 2,
> };
> +
> +const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs = {
> + .has_phy_lane = true,
> + .regulator_data = dsi_phy_14nm_17mA_regulators,
> + .num_regulators = ARRAY_SIZE(dsi_phy_14nm_17mA_regulators),
> + .ops = {
> + .enable = dsi_14nm_phy_enable,
> + .disable = dsi_14nm_phy_disable,
> + .pll_init = dsi_pll_14nm_init,
> + .save_pll_state = dsi_14nm_pll_save_state,
> + .restore_pll_state = dsi_14nm_pll_restore_state,
> + },
> + .min_pll_rate = VCO_MIN_RATE,
> + .max_pll_rate = VCO_MAX_RATE,
> + .io_start = { 0x5e94400 },
For sm6125 we also need this exact io_start (and a single PHY), do you
think it makes sense to add a compatible that reuses the same struct (I
can do that in a folloup patch) and/or generalize this struct (name)?
However, our regulator setup appears to be different. I recall not
finding any `vcca` supply in my downstream sources, and had this in my
notes for a similar dsi_phy_14nm.c patch:
sm6125 uses an RPM regulator
https://github.com/sonyxperiadev/kernel/blob/f956fbd9a234033bd18234d456a2c32c126b38f3/arch/arm64/boot/dts/qcom/trinket-sde.dtsi#L388
- Marijn
> + .num_dsi_phy = 1,
> +};
> --
> 2.35.1
>
