LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting
the i.MX8M Mini/Nano DSI host to add additional Data Enable signal
active low (DE_LOW). This makes the valid data transfer on each
horizontal line.

So, add additional bus flags DE_LOW setting via input_bus_flags for
i.MX8M Mini/Nano platforms.

v9:
* none

v8:
* add DE_LOW for i.MX8M Mini/Nano platforms.

v7, v6:
* none

v5:
* rebased based on updated bridge changes

v4, v3, v2, v1:
* none

Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
 drivers/gpu/drm/bridge/samsung-dsim.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c 
b/drivers/gpu/drm/bridge/samsung-dsim.c
index ef0d802d25bf..4de1294f29b3 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1654,6 +1654,10 @@ static const struct samsung_dsim_host_ops 
samsung_dsim_generic_host_ops = {
        .unregister_host = samsung_dsim_unregister_host,
 };
 
+static const struct drm_bridge_timings samsung_dsim_bridge_timings_de_low = {
+       .input_bus_flags = DRM_BUS_FLAG_DE_LOW,
+};
+
 int samsung_dsim_probe(struct platform_device *pdev)
 {
        struct device *dev = &pdev->dev;
@@ -1736,6 +1740,10 @@ int samsung_dsim_probe(struct platform_device *pdev)
        dsi->bridge.of_node = dev->of_node;
        dsi->bridge.type = DRM_MODE_CONNECTOR_DSI;
 
+       /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */
+       if (dsi->plat_data->hw_type == SAMSUNG_DSIM_TYPE_IMX8MM)
+               dsi->bridge.timings = &samsung_dsim_bridge_timings_de_low;
+
        if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host)
                ret = dsi->plat_data->host_ops->register_host(dsi);
 
-- 
2.25.1

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