On Tue, 2023-05-02 at 09:38 -0700, Ceraolo Spurio, Daniele wrote:
> The GSC notifies us of a proxy request via the HECI2 interrupt. The
> interrupt must be enabled both in the HECI layer and in our usual gt irq
> programming; for the latter, the interrupt is enabled via the same enable
> register as the GSC CS, but it does have its own mask register. When the
> interrupt is received, we also need to de-assert it in both layers.
>
> The handling of the proxy request is deferred to the same worker that we
> use for GSC load. New flags have been added to distinguish between the
> init case and the proxy interrupt.
>
> v2: Make sure not to set the reset bit when enabling/disabling the GSC
> interrupts, fix defines (Alan)
>
> v3: rebase on proxy status register check
>
alan:snip
Reviewed-by: Alan Previn <alan.previn.teres.ale...@intel.com>