We already have the steps to program post-blending shaper/3D LUT on AMD
display driver, but unlike MPC 3D LUT, we don't need to acquire/release
DPP 3D LUT. We can reuse programming steps to map plane properties to
DC plane for pre-blending (plane) shaper/3D LUT setup.
Signed-off-by: Melissa Wen <m...@igalia.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 35 ++++++++++++++++---
2 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 11135c3db6cc..2674ecdad717 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8022,6 +8022,8 @@ static void amdgpu_dm_commit_planes(struct
drm_atomic_state *state,
bundle->surface_updates[planes_count].in_transfer_func
= dc_plane->in_transfer_func;
bundle->surface_updates[planes_count].gamut_remap_matrix =
&dc_plane->gamut_remap_matrix;
bundle->surface_updates[planes_count].hdr_mult =
dc_plane->hdr_mult;
+ bundle->surface_updates[planes_count].func_shaper =
dc_plane->in_shaper_func;
+ bundle->surface_updates[planes_count].lut3d_func =
dc_plane->lut3d_func;
}
amdgpu_dm_plane_fill_dc_scaling_info(dm->adev, new_plane_state,
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index 57d6aab76295..b075c9f6e717 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -911,6 +911,35 @@ __set_dm_plane_degamma(struct drm_plane_state *plane_state,
return 0;
}
+static int
+amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state,
+ struct dc_plane_state *dc_plane_state)
+{
+ struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
+ enum drm_transfer_function shaper_tf = DRM_TRANSFER_FUNCTION_DEFAULT;
+ const struct drm_color_lut *shaper_lut, *lut3d;
+ uint32_t lut3d_size, shaper_size;
+
+ /* We have nothing to do here, return */
+ if (!plane_state->color_mgmt_changed)
+ return 0;
+
+ dc_plane_state->hdr_mult =
dc_fixpt_from_s3132(dm_plane_state->hdr_mult);
+
+ shaper_tf = dm_plane_state->shaper_tf;
+ shaper_lut = __extract_blob_lut(dm_plane_state->shaper_lut,
&shaper_size);
+ lut3d = __extract_blob_lut(dm_plane_state->lut3d, &lut3d_size);
+ lut3d_size = lut3d != NULL ? lut3d_size : 0;
+ shaper_size = shaper_lut != NULL ? shaper_size : 0;
+
+ amdgpu_dm_atomic_lut3d(lut3d, lut3d_size, dc_plane_state->lut3d_func);
+ ret = amdgpu_dm_atomic_shaper_lut(shaper_lut, false,
+ drm_tf_to_dc_tf(shaper_tf),
+ shaper_size,
dc_plane_state->in_shaper_func);
+
+ return ret;
+}
+
/**
* amdgpu_dm_update_plane_color_mgmt: Maps DRM color management to DC plane.
* @crtc: amdgpu_dm crtc state
@@ -928,7 +957,6 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state
*crtc,
struct drm_plane_state *plane_state,
struct dc_plane_state *dc_plane_state)
{
- struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
bool has_crtc_cm_degamma;
int ret;
@@ -939,8 +967,6 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state
*crtc,
/* After, we start to update values according to color props */
has_crtc_cm_degamma = (crtc->cm_has_degamma ||
crtc->cm_is_degamma_srgb);
- dc_plane_state->hdr_mult =
dc_fixpt_from_s3132(dm_plane_state->hdr_mult);
-
ret = __set_dm_plane_degamma(plane_state, dc_plane_state);
if (ret == -ENOMEM)
return ret;
@@ -972,5 +998,6 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state
*crtc,
return ret;
}
- return 0;
+ return amdgpu_dm_plane_set_color_properties(plane_state,
+ dc_plane_state);
}
--
2.39.2
