From: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Commit 9275277d5324 ("drm/i915: use pat_index instead of cache_level") added a dedicated gen12_pte_encode but forgot to remove the Gen12 specific bit from gen8_pte_encode.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level") Cc: Fei Yang <fei.y...@intel.com> Cc: Andi Shyti <andi.sh...@linux.intel.com> Cc: Matt Roper <matthew.d.ro...@intel.com> --- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c index f948d33e5ec5..c8568e5d1147 100644 --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c @@ -37,9 +37,6 @@ static u64 gen8_pte_encode(dma_addr_t addr, if (unlikely(flags & PTE_READ_ONLY)) pte &= ~GEN8_PAGE_RW; - if (flags & PTE_LM) - pte |= GEN12_PPGTT_PTE_LM; - /* * For pre-gen12 platforms pat_index is the same as enum * i915_cache_level, so the switch-case here is still valid. -- 2.39.2