On 2023-07-27 19:21:02, Dmitry Baryshkov wrote:
> Replace the only user of the DPU_INTF_TE feature flag with the direct
> DPU version comparison.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suij...@somainline.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 --
> 3 files changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> index 9589fe719452..60d4dd88725e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> @@ -776,8 +776,8 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init(
> phys_enc->intf_mode = INTF_MODE_CMD;
> cmd_enc->stream_sel = 0;
>
> - phys_enc->has_intf_te = test_bit(DPU_INTF_TE,
> - &phys_enc->hw_intf->cap->features);
> + if (phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver >= 5)
> + phys_enc->has_intf_te = true;
We could also check if the INTF block has the callbacks (which it based
on the presence of the interrupt line in the catalog instead), but then
I think we might loose some extra validation which you tidied up in a
later patch in this series?
>
> atomic_set(&cmd_enc->pending_vblank_cnt, 0);
> init_waitqueue_head(&cmd_enc->pending_vblank_wq);
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index c19dc70d4456..17426f0f981e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -100,7 +100,6 @@
>
> #define INTF_SC7180_MASK \
> (BIT(DPU_INTF_INPUT_CTRL) | \
> - BIT(DPU_INTF_TE) | \
> BIT(DPU_INTF_STATUS_SUPPORTED) | \
> BIT(DPU_DATA_HCTL_EN))
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index a6f8eee58b92..69c9099cf5a6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -175,7 +175,6 @@ enum {
> * INTF sub-blocks
> * @DPU_INTF_INPUT_CTRL Supports the setting of pp block from
> which
> * pixel data arrives to this INTF
> - * @DPU_INTF_TE INTF block has TE configuration support
> * @DPU_DATA_HCTL_EN Allows data to be transferred at
> different rate
> * than video timing
> * @DPU_INTF_STATUS_SUPPORTED INTF block has INTF_STATUS register
> @@ -183,7 +182,6 @@ enum {
> */
> enum {
> DPU_INTF_INPUT_CTRL = 0x1,
> - DPU_INTF_TE,
> DPU_DATA_HCTL_EN,
> DPU_INTF_STATUS_SUPPORTED,
> DPU_INTF_MAX
> --
> 2.39.2
>
