From: Rob Clark <robdcl...@chromium.org>

[ Upstream commit 459f9e26e7d49f80f587d7592ccb78e00ab458e4 ]

Rather than just open coding a list of gpu-id matches.

Signed-off-by: Rob Clark <robdcl...@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dyb...@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/549764/
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c      | 3 +--
 drivers/gpu/drm/msm/adreno/adreno_device.c | 4 ++++
 drivers/gpu/drm/msm/adreno/adreno_gpu.h    | 1 +
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index b3ada1e7b598b..77901af95b5a3 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -2491,8 +2491,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
        /* Quirk data */
        adreno_gpu->info = info;
 
-       if (adreno_is_a650(adreno_gpu) || adreno_is_a660_family(adreno_gpu))
-               adreno_gpu->base.hw_apriv = true;
+       adreno_gpu->base.hw_apriv = !!(info->quirks & 
ADRENO_QUIRK_HAS_HW_APRIV);
 
        a6xx_llc_slices_init(pdev, a6xx_gpu);
 
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c 
b/drivers/gpu/drm/msm/adreno/adreno_device.c
index ce8d0b2475bf1..5751077c201eb 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -325,6 +325,7 @@ static const struct adreno_info gpulist[] = {
                },
                .gmem = SZ_1M + SZ_128K,
                .inactive_period = DRM_MSM_INACTIVE_PERIOD,
+               .quirks = ADRENO_QUIRK_HAS_HW_APRIV,
                .init = a6xx_gpu_init,
                .zapfw = "a650_zap.mdt",
                .hwcg = a650_hwcg,
@@ -339,6 +340,7 @@ static const struct adreno_info gpulist[] = {
                },
                .gmem = SZ_1M + SZ_512K,
                .inactive_period = DRM_MSM_INACTIVE_PERIOD,
+               .quirks = ADRENO_QUIRK_HAS_HW_APRIV,
                .init = a6xx_gpu_init,
                .zapfw = "a660_zap.mdt",
                .hwcg = a660_hwcg,
@@ -351,6 +353,7 @@ static const struct adreno_info gpulist[] = {
                },
                .gmem = SZ_512K,
                .inactive_period = DRM_MSM_INACTIVE_PERIOD,
+               .quirks = ADRENO_QUIRK_HAS_HW_APRIV,
                .init = a6xx_gpu_init,
                .hwcg = a660_hwcg,
                .address_space_size = SZ_16G,
@@ -375,6 +378,7 @@ static const struct adreno_info gpulist[] = {
                },
                .gmem = SZ_4M,
                .inactive_period = DRM_MSM_INACTIVE_PERIOD,
+               .quirks = ADRENO_QUIRK_HAS_HW_APRIV,
                .init = a6xx_gpu_init,
                .zapfw = "a690_zap.mdt",
                .hwcg = a690_hwcg,
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 845019891ad19..a925e04a2283c 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -32,6 +32,7 @@ enum {
 #define ADRENO_QUIRK_TWO_PASS_USE_WFI          BIT(0)
 #define ADRENO_QUIRK_FAULT_DETECT_MASK         BIT(1)
 #define ADRENO_QUIRK_LMLOADKILL_DISABLE                BIT(2)
+#define ADRENO_QUIRK_HAS_HW_APRIV              BIT(3)
 
 struct adreno_rev {
        uint8_t  core;
-- 
2.40.1

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