On 9/20/23 12:31, Lucas Stach wrote:
The comment regarding AXI bust size configuration is a bit hard
to read. Improve the wording somewhat.
Signed-off-by: Lucas Stach <l.st...@pengutronix.de>
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c
b/drivers/gpu/drm/mxsfb/lcdif_kms.c
index 2541d2de4e45..f5bfe8b52920 100644
--- a/drivers/gpu/drm/mxsfb/lcdif_kms.c
+++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c
@@ -329,12 +329,12 @@ static void lcdif_set_mode(struct lcdif_drm_private
*lcdif, u32 bus_flags)
lcdif->base + LCDC_V8_CTRLDESCL0_1);
/*
- * Undocumented P_SIZE and T_SIZE register but those written in the
- * downstream kernel those registers control the AXI burst size. As of
- * now there are two known values:
+ * Undocumented P_SIZE and T_SIZE bitfields written in the downstream
s@written@documented only@ or so, since yeah, those fields are only used
in the downstream driver and miss in the TRM .
+ * driver. Those bitfields control the AXI burst size. As of now there
+ * are two known values:
* 1 - 128Byte
* 2 - 256Byte
- * Downstream set it to 256B burst size to improve the memory
+ * Downstream sets this to 256B burst size to improve the memory access
* efficiency so set it here too.
With that fixed:
Reviewed-by: Marek Vasut <ma...@denx.de>
