On Thu, Sep 28, 2023 at 02:55:35PM +0200, Lucas Stach wrote: > Add binding for the i.MX8MP HDMI parallel video interface block. > > Signed-off-by: Lucas Stach <l.st...@pengutronix.de> > Reviewed-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com> > --- > .../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 83 +++++++++++++++++++ > 1 file changed, 83 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml > > diff --git > a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml > b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml > new file mode 100644 > index 000000000000..df29006b4090 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml > @@ -0,0 +1,83 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale i.MX8MP HDMI Parallel Video Interface > + > +maintainers: > + - Lucas Stach <l.st...@pengutronix.de> > + > +description: |
This | is not needed as there's no formatting here requiring
preservation.
Otherwise, looks grand to me. You can fix that up if you resend I guess.
Reviewed-by: Conor Dooley <conor.doo...@microchip.com>
Thanks,
Conor.
> + The HDMI parallel video interface is a timing and sync generator block in
> the
> + i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
> +
> +properties:
> + compatible:
> + const: fsl,imx8mp-hdmi-pvi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Input from the LCDIF controller.
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Output to the HDMI TX controller.
> +
> + required:
> + - port@0
> + - port@1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - power-domains
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/power/imx8mp-power.h>
> +
> + display-bridge@32fc4000 {
> + compatible = "fsl,imx8mp-hdmi-pvi";
> + reg = <0x32fc4000 0x40>;
> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + pvi_from_lcdif3: endpoint {
> + remote-endpoint = <&lcdif3_to_pvi>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + pvi_to_hdmi_tx: endpoint {
> + remote-endpoint = <&hdmi_tx_from_pvi>;
> + };
> + };
> + };
> + };
> --
> 2.39.2
>
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