From: Lucas Stach <l.st...@pengutronix.de>

This adds the PGC and HDMI blk-ctrl nodes providing power control for
HDMI subsystem peripherals.

Signed-off-by: Adam Ford <aford...@gmail.com>
Signed-off-by: Lucas Stach <l.st...@pengutronix.de>
---
V2:  Add missing power-domains hdcp and hrv
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 38 +++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 76c73daf546b..5c54073de615 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -836,6 +836,23 @@ pgc_mediamix: power-domain@10 {
                                                         <&clk 
IMX8MP_CLK_MEDIA_APB_ROOT>;
                                        };
 
+                                       pgc_hdmimix: power-domains@14 {
+                                               #power-domain-cells = <0>;
+                                               reg = 
<IMX8MP_POWER_DOMAIN_HDMIMIX>;
+                                               clocks = <&clk 
IMX8MP_CLK_HDMI_ROOT>,
+                                                        <&clk 
IMX8MP_CLK_HDMI_APB>;
+                                               assigned-clocks = <&clk 
IMX8MP_CLK_HDMI_AXI>,
+                                                                 <&clk 
IMX8MP_CLK_HDMI_APB>;
+                                               assigned-clock-parents = <&clk 
IMX8MP_SYS_PLL2_500M>,
+                                                                        <&clk 
IMX8MP_SYS_PLL1_133M>;
+                                               assigned-clock-rates = 
<500000000>, <133000000>;
+                                       };
+
+                                       pgc_hdmi_phy: power-domains@15 {
+                                               #power-domain-cells = <0>;
+                                               reg = 
<IMX8MP_POWER_DOMAIN_HDMI_PHY>;
+                                       };
+
                                        pgc_mipi_phy2: power-domain@16 {
                                                #power-domain-cells = <0>;
                                                reg = 
<IMX8MP_POWER_DOMAIN_MIPI_PHY2>;
@@ -1361,6 +1378,27 @@ eqos: ethernet@30bf0000 {
                                intf_mode = <&gpr 0x4>;
                                status = "disabled";
                        };
+
+                       hdmi_blk_ctrl: blk-ctrl@32fc0000 {
+                               compatible = "fsl,imx8mp-hdmi-blk-ctrl", 
"syscon";
+                               reg = <0x32fc0000 0x23c>;
+                               clocks = <&clk IMX8MP_CLK_HDMI_APB>,
+                                        <&clk IMX8MP_CLK_HDMI_ROOT>,
+                                        <&clk IMX8MP_CLK_HDMI_REF_266M>,
+                                        <&clk IMX8MP_CLK_HDMI_24M>,
+                                        <&clk IMX8MP_CLK_HDMI_FDCC_TST>;
+                               clock-names = "apb", "axi", "ref_266m", 
"ref_24m", "fdcc";
+                               power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>,
+                                               <&pgc_hdmimix>, <&pgc_hdmimix>,
+                                               <&pgc_hdmimix>, <&pgc_hdmimix>,
+                                               <&pgc_hdmimix>, <&pgc_hdmi_phy>,
+                                               <&pgc_hdmimix>, <&pgc_hdmimix>;
+                               power-domain-names = "bus", "irqsteer", "lcdif",
+                                                    "pai", "pvi", "trng",
+                                                    "hdmi-tx", "hdmi-tx-phy",
+                                                    "hdcp", "hrv";
+                               #power-domain-cells = <1>;
+                       };
                };
 
                aips5: bus@30c00000 {
-- 
2.43.0

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