If the sink supports 128b/132b and single-stream sideband messaging,
enable MST mode.
With this, the topology manager will still write DP_MSTM_CTRL, which
should be ignored by the sink. In the future, the topology manager
should probably only set the sideband messaging related parts of the
register.
Cc: Arun R Murthy <arun.r.mur...@intel.com>
Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 7f97d5512a3e..689d5c8ba6b0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4027,7 +4027,8 @@ intel_dp_mst_mode_choose(struct intel_dp *intel_dp,
if (!intel_dp_mst_source_support(intel_dp))
return DRM_DP_SST;
- if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG)
+ if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG &&
+ !(intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] &
DP_CAP_ANSI_128B132B))
return DRM_DP_SST;
return sink_mst_mode;
--
2.39.2
