[PATCH v2 4/7] drm/rockchip: dsi: Support optional AHB clock

[Alex Bee]

Some integrations of the IP additionally have an AHB clock which has to be
enabled before accessing the registers is possible.

Add support for it as an optional clock.

Signed-off-by: Alex Bee <knaerz...@gmail.com>
---
changes since v1:
 - new patch

 .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c   | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 
b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index 4cc8ed8f4fbd..6ed64cc35275 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -265,6 +265,7 @@ struct dw_mipi_dsi_rockchip {
        struct clk *pllref_clk;
        struct clk *grf_clk;
        struct clk *phy_cfg_clk;
+       struct clk *ahb_clk;
 
        /* dual-channel */
        bool is_slave;
@@ -1153,7 +1154,15 @@ static int dw_mipi_dsi_dphy_init(struct phy *phy)
                        goto err_init;
                }
 
+               ret = clk_prepare_enable(dsi->ahb_clk);
+               if (ret) {
+                       clk_disable_unprepare(dsi->grf_clk);
+                       clk_disable_unprepare(dsi->pclk);
+                       goto err_init;
+               }
+
                ret = dsi->cdata->dphy_rx_init(phy);
+               clk_disable_unprepare(dsi->ahb_clk);
                clk_disable_unprepare(dsi->grf_clk);
                clk_disable_unprepare(dsi->pclk);
                if (ret < 0)
@@ -1240,6 +1249,12 @@ static int dw_mipi_dsi_dphy_power_on(struct phy *phy)
                goto err_phy_cfg_clk;
        }
 
+       ret = clk_prepare_enable(dsi->ahb_clk);
+       if (ret) {
+               DRM_DEV_ERROR(dsi->dev, "Failed to enable ahb_clk: %d\n", ret);
+               goto err_ahb_clk;
+       }
+
        /* do soc-variant specific init */
        if (dsi->cdata->dphy_rx_power_on) {
                ret = dsi->cdata->dphy_rx_power_on(phy);
@@ -1269,6 +1284,8 @@ static int dw_mipi_dsi_dphy_power_on(struct phy *phy)
        return ret;
 
 err_pwr_on:
+       clk_disable_unprepare(dsi->ahb_clk);
+err_ahb_clk:
        clk_disable_unprepare(dsi->phy_cfg_clk);
 err_phy_cfg_clk:
        clk_disable_unprepare(dsi->grf_clk);
@@ -1296,6 +1313,7 @@ static int dw_mipi_dsi_dphy_power_off(struct phy *phy)
                        DRM_DEV_ERROR(dsi->dev, "hardware-specific phy shutdown 
failed: %d\n", ret);
        }
 
+       clk_disable_unprepare(dsi->ahb_clk);
        clk_disable_unprepare(dsi->grf_clk);
        clk_disable_unprepare(dsi->pclk);
 
@@ -1429,6 +1447,13 @@ static int dw_mipi_dsi_rockchip_probe(struct 
platform_device *pdev)
                }
        }
 
+       dsi->ahb_clk = devm_clk_get_optional(dev, "ahb");
+       if (IS_ERR(dsi->ahb_clk)) {
+               ret = PTR_ERR(dsi->ahb_clk);
+               DRM_DEV_ERROR(dev, "Unable to get ahb_clk: %d\n", ret);
+               return ret;
+       }
+
        dsi->grf_regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
        if (IS_ERR(dsi->grf_regmap)) {
                DRM_DEV_ERROR(dev, "Unable to get rockchip,grf\n");
-- 
2.43.2