[PATCH AUTOSEL 6.10 165/197] drm/amdgpu: fix unchecked return value warning for amdgpu_gfx

[Sasha Levin]

From: Tim Huang <tim.hu...@amd.com>

[ Upstream commit c0277b9d7c2ee9ee5dbc948548984f0fbb861301 ]

This resolves the unchecded return value warning reported by Coverity.

Signed-off-by: Tim Huang <tim.hu...@amd.com>
Reviewed-by: Jesse Zhang <jesse.zh...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index e92bdc9a39d35..1935b211b527d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -816,8 +816,11 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, 
struct ras_common_if *r
        int r;
 
        if (amdgpu_ras_is_supported(adev, ras_block->block)) {
-               if (!amdgpu_persistent_edc_harvesting_supported(adev))
-                       amdgpu_ras_reset_error_status(adev, 
AMDGPU_RAS_BLOCK__GFX);
+               if (!amdgpu_persistent_edc_harvesting_supported(adev)) {
+                       r = amdgpu_ras_reset_error_status(adev, 
AMDGPU_RAS_BLOCK__GFX);
+                       if (r)
+                               return r;
+               }
 
                r = amdgpu_ras_block_late_init(adev, ras_block);
                if (r)
@@ -961,7 +964,10 @@ uint32_t amdgpu_kiq_rreg(struct amdgpu_device *adev, 
uint32_t reg, uint32_t xcc_
                pr_err("critical bug! too many kiq readers\n");
                goto failed_unlock;
        }
-       amdgpu_ring_alloc(ring, 32);
+       r = amdgpu_ring_alloc(ring, 32);
+       if (r)
+               goto failed_unlock;
+
        amdgpu_ring_emit_rreg(ring, reg, reg_val_offs);
        r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT);
        if (r)
@@ -1027,7 +1033,10 @@ void amdgpu_kiq_wreg(struct amdgpu_device *adev, 
uint32_t reg, uint32_t v, uint3
        }
 
        spin_lock_irqsave(&kiq->ring_lock, flags);
-       amdgpu_ring_alloc(ring, 32);
+       r = amdgpu_ring_alloc(ring, 32);
+       if (r)
+               goto failed_unlock;
+
        amdgpu_ring_emit_wreg(ring, reg, v);
        r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT);
        if (r)
@@ -1063,6 +1072,7 @@ void amdgpu_kiq_wreg(struct amdgpu_device *adev, uint32_t 
reg, uint32_t v, uint3
 
 failed_undo:
        amdgpu_ring_undo(ring);
+failed_unlock:
        spin_unlock_irqrestore(&kiq->ring_lock, flags);
 failed_kiq_write:
        dev_err(adev->dev, "failed to write reg:%x\n", reg);
-- 
2.43.0