From: Abhinav Kumar <quic_abhin...@quicinc.com>
As required by the hardware programming guide, always program
the MST_FIFO_CONSTANT_FILL for MST use-cases.
Signed-off-by: Abhinav Kumar <quic_abhin...@quicinc.com>
Signed-off-by: Yongxing Mou <quic_yong...@quicinc.com>
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 16 ++++++++++++++++
drivers/gpu/drm/msm/dp/dp_catalog.h | 2 ++
drivers/gpu/drm/msm/dp/dp_ctrl.c | 2 ++
3 files changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c
b/drivers/gpu/drm/msm/dp/dp_catalog.c
index
f2a5170723585ed6ddab2c12d2e5c5d6dee5eff5..b536530be160ed58ef17bf71385c3c4fc7617132
100644
--- a/drivers/gpu/drm/msm/dp/dp_catalog.c
+++ b/drivers/gpu/drm/msm/dp/dp_catalog.c
@@ -1011,6 +1011,22 @@ int msm_dp_catalog_panel_timing_cfg(struct
msm_dp_catalog *msm_dp_catalog,
return 0;
}
+int msm_dp_catalog_mst_async_fifo(struct msm_dp_catalog *msm_dp_catalog,
+ enum msm_dp_stream_id stream_id, bool enable)
+{
+ struct msm_dp_catalog_private *catalog = container_of(msm_dp_catalog,
+ struct
msm_dp_catalog_private,
+ msm_dp_catalog);
+
+ /* enable MST_FIFO_CONSTANT_FILL */
+ if (enable)
+ msm_dp_write_pn(catalog, stream_id, MMSS_DP_ASYNC_FIFO_CONFIG,
0x01);
+ else
+ msm_dp_write_pn(catalog, stream_id, MMSS_DP_ASYNC_FIFO_CONFIG,
0x00);
+
+ return 0;
+}
+
static void msm_dp_catalog_panel_send_vsc_sdp(struct msm_dp_catalog
*msm_dp_catalog,
enum msm_dp_stream_id stream_id,
struct dp_sdp *vsc_sdp)
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h
b/drivers/gpu/drm/msm/dp/dp_catalog.h
index
a1ecab2f386f321ea9d176b3cf3f894a230c9085..7576458d4ef13def4f4d18073bd25ec0ffabde28
100644
--- a/drivers/gpu/drm/msm/dp/dp_catalog.h
+++ b/drivers/gpu/drm/msm/dp/dp_catalog.h
@@ -145,5 +145,7 @@ void msm_dp_catalog_mst_channel_alloc(struct msm_dp_catalog
*dp_catalog,
u32 tot_slot_cnt);
void msm_dp_catalog_ctrl_update_rg(struct msm_dp_catalog *dp_catalog,
enum msm_dp_stream_id stream_id, u32 x_int,
u32 y_frac_enum);
+int msm_dp_catalog_mst_async_fifo(struct msm_dp_catalog *dp_catalog,
+ enum msm_dp_stream_id stream_id, bool enable);
#endif /* _DP_CATALOG_H_ */
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index
a61514d4b5d42cd92eb13aa7d6759cdc9c0dda71..7056d5638829e8510054614b19afbcaf8aba55b5
100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -236,6 +236,8 @@ static void msm_dp_ctrl_configure_source_params(struct
msm_dp_ctrl_private *ctrl
cc = msm_dp_link_get_colorimetry_config(ctrl->link);
msm_dp_catalog_ctrl_config_misc(ctrl->catalog, msm_dp_panel->stream_id,
cc, tb);
msm_dp_panel_timing_cfg(msm_dp_panel);
+
+ msm_dp_catalog_mst_async_fifo(ctrl->catalog, msm_dp_panel->stream_id,
ctrl->mst_active);
}
/*
--
2.34.1
