On Wed, Jun 18, 2025 at 12:22:08PM +0200, Michal Wilczynski wrote: > Extend the TH1520 AON to describe the GPU clkgen reset line, required > for proper GPU clock and reset sequencing. > > The T-HEAD TH1520 GPU requires coordinated management of two clocks > (core and sys) and two resets (GPU core reset and GPU clkgen reset). > Only the clkgen reset is exposed at the AON level, to support SoC > specific initialization handled through a dedicated auxiliary power > sequencing driver. The GPU core reset remains described in the GPU > device node, as from the GPU driver's perspective, there is only a > single reset line [1]. > > This follows upstream maintainers' recommendations [2] to abstract SoC > specific details into the PM domain layer rather than exposing them to > drivers directly. > > Link: > https://lore.kernel.org/all/[email protected]/ > - [1] > Link: > https://lore.kernel.org/all/[email protected]/ - [2] > > Reviewed-by: Ulf Hansson <[email protected]> > Signed-off-by: Michal Wilczynski <[email protected]> > --- > Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml > b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml > index > bbc183200400de7aadbb21fea21911f6f4227b09..3365124c7fd4736922717bd31caa13272f4a4ea6 > 100644 > --- a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml > +++ b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml > @@ -32,6 +32,13 @@ properties: > items: > - const: aon > > + resets: > + maxItems: 1 > + > + reset-names: > + items: > + - const: gpu-clkgen > + > "#power-domain-cells": > const: 1 > > > -- > 2.34.1 >
Reviewed-by: Drew Fustini <[email protected]> I'm wondering what tree this should go through. Ulf took the original patch that created the binding. Thanks, Drew
