From: "shangyao.lin" <shangyao....@mediatek.com> Add camera isp7x module device document.
--- Changes in v2: - Rename binding file to mediatek,mt8188-cam-yuv.yaml - Various fixes per review comments - Update maintainers list Signed-off-by: shangyao.lin <shangyao....@mediatek.com> --- .../mediatek/mediatek,mt8188-cam-yuv.yaml | 134 ++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100755 Documentation/devicetree/bindings/media/mediatek/mediatek,mt8188-cam-yuv.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek/mediatek,mt8188-cam-yuv.yaml b/Documentation/devicetree/bindings/media/mediatek/mediatek,mt8188-cam-yuv.yaml new file mode 100755 index 000000000000..0de120d3c6e8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek/mediatek,mt8188-cam-yuv.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2024 MediaTek Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek/mediatek,cam-yuv.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: The cam-yuv unit of MediaTek ISP system + +maintainers: + - Shangyao Lin <shangyao....@mediatek.com> + - Shu-hsiang Yang <shu-hsiang.y...@mediatek.com> + - Shun-yi Wang <shun-yi.w...@mediatek.com> + - Teddy Chen <teddy.c...@mediatek.com> + +description: + MediaTek cam-yuv is the camera YUV processing unit in MediaTek SoC. + +properties: + compatible: + const: mediatek,mt8188-cam-yuv + + reg: + minItems: 1 + maxItems: 2 + description: + Base address and optional inner base address of the cam-yuv hardware block. + + reg-names: + items: + - const: base + - const: inner_base + minItems: 1 + maxItems: 2 + description: + Names for each register region. Must be "base" and optionally "inner_base". + + mediatek,larbs: + description: + List of phandles to the local arbiters in the current SoCs. + Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 1 + maxItems: 32 + + interrupts: + minItems: 1 + description: Interrupts for the cam-yuv block. + + dma-ranges: + minItems: 1 + description: Address information of IOMMU mapping to memory. + + power-domains: + minItems: 1 + description: Power domains for the cam-yuv block. + + clocks: + minItems: 4 + maxItems: 16 + description: List of phandles to the clocks required by the cam-yuv block. + + clock-names: + items: + - const: camsys_cam2mm0_cgpdn + - const: camsys_cam2mm1_cgpdn + - const: camsys_cam2sys_cgpdn + - const: camsys_yuva_larbx + - const: camsys_yuva_cam_cgpdn + - const: camsys_yuva_camtg_cgpdn + - const: camsys_yuvb_larbx_cgpdn + - const: camsys_yuvb_cam_cgpdn + - const: camsys_yuvb_camtg_cgpdn + minItems: 4 + maxItems: 16 + description: Names of the clocks, must match the order of the clocks property. + + iommus: + minItems: 1 + maxItems: 32 + description: Points to the respective IOMMU block with master port as argument. + +required: + - compatible + - reg + - reg-names + - interrupts + - power-domains + - clocks + - clock-names + - iommus + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/power/mediatek,mt8188-power.h> + #include <dt-bindings/clock/mediatek,mt8188-clk.h> + #include <dt-bindings/memory/mediatek,mt8188-memory-port.h> + + soc { + yuv@16050000 { + compatible = "mediatek,mt8188-cam-yuv"; + reg = <0 0x16050000 0 0x8000>; + reg-names = "base"; + mediatek,larbs = <&larb17a>; + interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH 0>; + dma-ranges = <0x2 0x0 0x0 0x40000000 0x1 0x0>; + power-domains = <&spm MT8188_POWER_DOMAIN_CAM_SUBA>; + clocks = <&camsys CLK_CAM_MAIN_CAM2MM0_GALS>, + <&camsys CLK_CAM_MAIN_CAM2MM1_GALS>, + <&camsys CLK_CAM_MAIN_CAM2SYS_GALS>, + <&camsys_yuva CLK_CAM_YUVA_LARBX>, + <&camsys_yuva CLK_CAM_YUVA_CAM>, + <&camsys_yuva CLK_CAM_YUVA_CAMTG>; + clock-names = "camsys_cam2mm0_cgpdn", + "camsys_cam2mm1_cgpdn", + "camsys_cam2sys_cgpdn", + "camsys_yuva_larbx_cgpdn", + "camsys_yuva_cam_cgpdn", + "camsys_yuva_camtg_cgpdn"; + iommus = <&vpp_iommu M4U_PORT_L17A_YUVO_R1>, + <&vpp_iommu M4U_PORT_L17A_YUVO_R3>, + <&vpp_iommu M4U_PORT_L17A_YUVCO_R1>, + <&vpp_iommu M4U_PORT_L17A_YUVO_R2>, + <&vpp_iommu M4U_PORT_L17A_RZH1N2TO_R1>, + <&vpp_iommu M4U_PORT_L17A_DRZS4NO_R1>, + <&vpp_iommu M4U_PORT_L17A_TNCSO_R1>; + }; + }; + +... -- 2.18.0
