On 25/07/2025 11:00, Matt Coster wrote: > On 25/07/2025 07:59, Krzysztof Kozlowski wrote: >> On Thu, Jul 24, 2025 at 04:18:59PM +0200, Michal Wilczynski wrote: >>> Update the img,powervr-rogue.yaml to include the T-HEAD TH1520 SoC's >>> specific GPU compatible string. >>> >>> The thead,th1520-gpu compatible, along with its full chain >>> img,img-bxm-4-64, and img,img-rogue, is added to the >>> list of recognized GPU types. >>> >>> While the BXM-4-64 GPU IP is designed with two distinct power domains, >>> the TH1520 SoC integrates it with only a single, unified power gate that >>> is controllable by the kernel. >>> >>> To model this reality correctly while keeping the binding accurate for >>> other devices, add conditional constraints to the `allOf` section: >>> - An if block for thead,th1520-gpu enforces a maximum of one >>> power domain and disallows the power-domain-names property. >> >> Why? >> >> This solves nothing, because you did not change the meaning of power >> domain entry. > > Hi Krzysztof, > > Just to clarify, is this an issue that can be resolved by documenting > the semantics of ">=1 power domains with names" vs "1 unnamed power > domain" in the binding file? Or are you suggesting an alternative method > of encoding this information in devicetree?
Currently, through power-domain names, the first entry in power domains is the 'a' domain. We usually prefer this to be explicit - listing items - but here, probably due to obviousness of names A and B, it did not happen. Disallowing power-domain names does magically change existing binding. I think you should list the power-domains items explicitly for each variant (see any of my other standard examples how this is done, e.g. clock controllers). Best regards, Krzysztof
