On 8/14/25 7:54 AM, Tomi Valkeinen wrote:

Hello Tomi,

On 14/08/2025 00:08, Marek Vasut wrote:
Remove fixed PPI lane count setup. The R-Car DSI host is capable
of operating in 1..4 DSI lane mode. Remove the hard-coded 4-lane
configuration from PPI register settings and instead configure
the PPI lane count according to lane count information already
obtained by this driver instance.

Configure TXSETR register to match PPI lane count. The R-Car V4H
Reference Manual R19UH0186EJ0121 Rev.1.21 section 67.2.2.3 Tx Set
Register (TXSETR), field LANECNT description indicates that the
TXSETR register LANECNT bitfield lane count must be configured
such, that it matches lane count configuration in PPISETR register
DLEN bitfield. Make sure the LANECNT and DLEN bitfields are
configured to match.

Fixes: 155358310f01 ("drm: rcar-du: Add R-Car DSI driver")
Cc: <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
---
Cc: David Airlie <[email protected]>
Cc: Geert Uytterhoeven <[email protected]>
Cc: Kieran Bingham <[email protected]>
Cc: Laurent Pinchart <[email protected]>
Cc: Maarten Lankhorst <[email protected]>
Cc: Magnus Damm <[email protected]>
Cc: Maxime Ripard <[email protected]>
Cc: Simona Vetter <[email protected]>
Cc: Thomas Zimmermann <[email protected]>
Cc: Tomi Valkeinen <[email protected]>
Cc: [email protected]
Cc: [email protected]
---
V2: - Split this out of a series, update commit message, combine from
       drm/rcar-du: dsi: Remove fixed PPI lane count setup
       drm/rcar-du: dsi: Configure TXSETR register to match PPI lane count
     - add Fixes tag, CC stable
---
  drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c      | 5 ++++-
  drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h | 8 ++++----
  2 files changed, 8 insertions(+), 5 deletions(-)

Reviewed-by: Tomi Valkeinen <[email protected]>
Would you like to pick this up via drm-misc , or shall I ?

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