On Fri, Sep 26, 2025 at 03:32:46PM +0200, Marek Vasut wrote: >On 9/26/25 11:18 AM, Rain Yang wrote: > >Hello Jiyu, > >> > > as the 0x4d810008 is a write-once register and whose operation has been >> > > moved into the SM side, >> > > so please drop the reset change. >> > > can you also change the label of the gpu node from gpu to mali like >> > > "mali: gpu@4d900000", >> > > as the internal driver use mali label to control the thermal up/low >> > > limitation. >> > >> > I updated all of the AHAB container, imx-oei and imx-sm components, and the >> > reset controller is no longer needed indeed. >> >> thanks, please update the gpu node label if possibly. > >Which label do you refer to, and which one would you prefer to have there ?
"mali: gpu@4d900000", not "gpu: gpu@4d900000". > >> > > BTW, does the dynamic frequency work well on your side so far with perf >> > > domain? >> > >> > How do I test that ? >> >> cat /sys/kernel/debug/clk/gpu/clk_rate, although its name in dts is core. >> it is an read-only scmi-clk. >> the clk rate should be fixed, as it can be changed only via scmi_perf in >> i.MX95. > >Right now, it is indeed fixed at 1 GHz . > >-- >Best regards, >Marek Vasut
