Hi Christian, On Sat, Sep 27, 2025 at 3:02 PM Christian Hewitt <[email protected]> wrote: [...] > @@ -894,6 +908,10 @@ static void meson_vclk_set(struct meson_drm *priv, > m = 0xf7; > frac = vic_alternate_clock ? 0x8148 : 0x10000; > break; > + case 4830000: > + m = 0xc9; > + frac = 0xd560; > + break; Initially I thought this was wrong because it's only added for the G12A (which is also used on G12B and SM1) code-path, leaving out the GX SoCs.
Was the 2560x1440 mode tested on a computer monitor or a TV? I suspect it's the former, so I think it expected the code to take the MESON_VCLK_TARGET_DMT path, which automatically calculates m and frac. I'll give it a try on Friday as I do have a computer monitor with that resolution - so any hints for testing are welcome! Best regards, Martin
