On Tue, Dec 23, 2025 at 10:30:56PM +0200, Dmitry Baryshkov wrote:
> On Mon, Dec 22, 2025 at 06:23:59PM +0800, yuanjie yang wrote:
> > From: Yuanjie Yang <[email protected]>
> >
> > Add support for Kaanapali platform SSPP sub-blocks, which
> > introduce structural changes including register additions,
> > removals, and relocations. Add the new common and rectangle
> > blocks, and update register definitions and handling to
> > ensure compatibility with DPU v13.0.
> >
> > Co-developed-by: Yongxing Mou <[email protected]>
> > Signed-off-by: Yongxing Mou <[email protected]>
> > Signed-off-by: Yuanjie Yang <[email protected]>
> > ---
> > drivers/gpu/drm/msm/Makefile | 1 +
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 13 +-
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 4 +
> > .../gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c | 321 ++++++++++++++++++
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 18 +
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 3 +
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 17 +-
> > 7 files changed, 371 insertions(+), 6 deletions(-)
> > create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c
> >
>
> > @@ -291,9 +292,10 @@ void dpu_hw_setup_format_impl(struct dpu_sw_pipe
> > *pipe, const struct msm_format
> > if (MSM_FORMAT_IS_UBWC(fmt))
> > opmode |= MDSS_MDP_OP_BWC_EN;
> > src_format |= (fmt->fetch_mode & 3) << 30; /*FRAME_FORMAT */
> > - DPU_REG_WRITE(c, SSPP_FETCH_CONFIG,
> > - DPU_FETCH_CONFIG_RESET_VALUE |
> > - ctx->ubwc->highest_bank_bit << 18);
> > + if (core_major_ver < 13)
> > + DPU_REG_WRITE(c, SSPP_FETCH_CONFIG,
> > + DPU_FETCH_CONFIG_RESET_VALUE |
> > + ctx->ubwc->highest_bank_bit << 18);
>
> I'd prefer if this is pulled into dpu_hw_sspp_setup_format().
OK, will put this part in dpu_hw_sspp_setup_format.
> > switch (ctx->ubwc->ubwc_enc_version) {
> > case UBWC_1_0:
> > fast_clear = fmt->alpha_enable ? BIT(31) : 0;
>
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
> > index 478a091aeccf..006dcc4a0dcc 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
>
> This commit was about SSPPs. Why are you touching WB?
Look like I should drop WB part in current patch,
and add a new patch just "add qos V13 in WB".
make it more clear for each patch function.
Thank,
Yuanjie
> > @@ -148,6 +148,15 @@ static void dpu_hw_wb_setup_qos_lut(struct dpu_hw_wb
> > *ctx,
> > cfg);
> > }
> >
> > +static void dpu_hw_wb_setup_qos_lut_v13(struct dpu_hw_wb *ctx,
> > + struct dpu_hw_qos_cfg *cfg)
> > +{
> > + if (!ctx || !cfg)
> > + return;
> > +
> > + _dpu_hw_setup_qos_lut_v13(&ctx->hw, cfg);
> > +}
> > +
> > static void dpu_hw_wb_setup_cdp(struct dpu_hw_wb *ctx,
> > const struct msm_format *fmt,
> > bool enable)
> > @@ -202,8 +211,12 @@ static void _setup_wb_ops(struct dpu_hw_wb_ops *ops,
> > if (test_bit(DPU_WB_XY_ROI_OFFSET, &features))
> > ops->setup_roi = dpu_hw_wb_roi;
> >
> > - if (test_bit(DPU_WB_QOS, &features))
> > - ops->setup_qos_lut = dpu_hw_wb_setup_qos_lut;
> > + if (test_bit(DPU_WB_QOS, &features)) {
> > + if (mdss_rev->core_major_ver >= 13)
> > + ops->setup_qos_lut = dpu_hw_wb_setup_qos_lut_v13;
> > + else
> > + ops->setup_qos_lut = dpu_hw_wb_setup_qos_lut;
> > + }
> >
> > if (test_bit(DPU_WB_CDP, &features))
> > ops->setup_cdp = dpu_hw_wb_setup_cdp;
> > --
> > 2.34.1
> >
>
> --
> With best wishes
> Dmitry
