From: Yuanjie Yang <[email protected]> During DPU runtime suspend, calling dev_pm_opp_set_rate(dev, 0) drops the MMCX rail to MIN_SVS while the core clock frequency remains at its original (highest) rate. When runtime resume re-enables the clock, this may result in a mismatch between the rail voltage and the clock rate.
Signed-off-by: Yuanjie Yang <[email protected]> --- Yuanjie Yang (2): drm/msm/dpu: fix mismatch between power and frequency drm/msm/dpu: use max_freq replace max_core_clk_rate drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 ++++++++++++++-------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 3 +++ 2 files changed, 17 insertions(+), 8 deletions(-) -- 2.34.1
