On 1/22/26 02:30, Dmitry Baryshkov wrote:
On Wed, Jan 21, 2026 at 05:40:28PM +0100, Neil Armstrong wrote:
From: KancyJoe <[email protected]>

Add initial Device Tree for the Ayaneo Pocket S2 gaming console based
on the Qualcomm Snapdragon 8 Gen 3 platform.

The design is similar to a phone wihout the modem, the game control
is handled via a standalone controller connected to a PCIe USB
controller.

Display support will be added in a second time.

Signed-off-by: KancyJoe <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
---
  arch/arm64/boot/dts/qcom/Makefile                  |    1 +
  .../boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts      | 1445 ++++++++++++++++++++
  arch/arm64/boot/dts/qcom/sm8650.dtsi               |    2 +-
  drivers/gpu/drm/msm/dsi/dsi.c                      |    4 +-
  4 files changed, 1449 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/Makefile 
b/arch/arm64/boot/dts/qcom/Makefile
index 6f34d5ed331c..1ba29755e5ba 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -313,6 +313,7 @@ dtb-$(CONFIG_ARCH_QCOM)     += sm8550-mtp.dtb
  dtb-$(CONFIG_ARCH_QCOM)       += sm8550-qrd.dtb
  dtb-$(CONFIG_ARCH_QCOM)       += sm8550-samsung-q5q.dtb
  dtb-$(CONFIG_ARCH_QCOM)       += sm8550-sony-xperia-yodo-pdx234.dtb
+dtb-$(CONFIG_ARCH_QCOM)        += sm8650-ayaneo-pocket-s2.dtb
sm8650-hdk-display-card-dtbs := sm8650-hdk.dtb sm8650-hdk-display-card.dtbo diff --git a/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts b/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts
new file mode 100644
index 000000000000..141d92933957
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts
+
+&i2c3 {

clock-frequency?

We never did so far we we didn't need more than 100KHz


+       status = "okay";
+
+       wcd_usbss: typec-mux@e {
+               compatible = "qcom,wcd9395-usbss", "qcom,wcd9390-usbss";
+               reg = <0xe>;
+
+               vdd-supply = <&vreg_l15b_1p8>;
+               reset-gpios = <&tlmm 152 GPIO_ACTIVE_HIGH>;
+
+               mode-switch;
+               orientation-switch;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               wcd_usbss_sbu_mux: endpoint {
+                                       remote-endpoint = <&pmic_glink_sbu>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+
+                               wcd_usbss_headset_out: endpoint {
+                                       remote-endpoint = 
<&wcd_codec_headset_in>;
+                               };
+                       };
+               };
+       };
+};
+
+&i2c6 {

clock-frequency?

+       status = "okay";
+
+       typec-mux@1c {
+               compatible = "onnn,nb7vpq904m";
+               reg = <0x1c>;
+
+               vcc-supply = <&vreg_l15b_1p8>;
+
+               retimer-switch;
+               orientation-switch;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               redriver_ss_out: endpoint {
+                                       remote-endpoint = <&pmic_glink_ss_in>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+
+                               redriver_ss_in: endpoint {
+                                       remote-endpoint = <&usb_dp_qmpphy_out>;
+                               };
+                       };
+               };
+       };
+};
+
+&iris {
+       status = "okay";

With the default firmware?

Yes


+&remoteproc_adsp {
+       firmware-name = "qcom/sm8650/ayaneo/ps2/adsp.mbn",
+                       "qcom/sm8650/ayaneo/ps2/adsp_dtb.mbn";
+
+       status = "okay";
+};
+
+&remoteproc_cdsp {
+       firmware-name = "qcom/sm8650/ayaneo/ps2/cdsp.mbn",
+                       "qcom/sm8650/ayaneo/ps2/cdsp_dtb.mbn";

Is it fused?

No but as Kancy reported, it's usual vendord provides their own
version with battery & features tuning.


+
+       status = "okay";
+};
+

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi 
b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 07ae74851621..fcd5a1a45803 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -3917,7 +3917,7 @@ opp-32000000-4 {
                                };
                        };
- pcie@0 {
+                       pcieport1: pcie@0 {
                                device_type = "pci";
                                reg = <0x0 0x0 0x0 0x0 0x0>;
                                bus-range = <0x01 0xff>;
diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c
index d8bb40ef820e..0781dce7cda2 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.c
+++ b/drivers/gpu/drm/msm/dsi/dsi.c

Something stray

@@ -43,12 +43,12 @@ static int dsi_get_phy(struct msm_dsi *msm_dsi)
        of_node_put(phy_node);
if (!phy_pdev) {
-               DRM_DEV_ERROR(&pdev->dev, "%s: phy driver is not ready\n", 
__func__);
+               DRM_DEV_ERROR(&pdev->dev, "%s: 0 phy driver is not ready\n", 
__func__);
                return -EPROBE_DEFER;
        }
        if (!msm_dsi->phy) {
                put_device(&phy_pdev->dev);
-               DRM_DEV_ERROR(&pdev->dev, "%s: phy driver is not ready\n", 
__func__);
+               DRM_DEV_ERROR(&pdev->dev, "%s: 1 phy driver is not ready\n", 
__func__);
                return -EPROBE_DEFER;
        }

Aw, will drop in v2

Neil

--
2.34.1



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