On 1/29/26 15:04, Hamza Mahfooz wrote:
> On Thu, Jan 29, 2026 at 01:59:00PM +0100, Christian König wrote:
>>> How do you propose to do that?
>>
>> I need to dig a bit into the DAL/DC code and see how the signaling path 
>> actually goes.
>>
>> Going to give that a try tomorrow.
>>
> 
> For recent ASICs, something along the lines of the following should do
> the trick:

Thanks a lot for that. What happens if you apply this?

Can the higher level handling recover from that? E.g. continue after 10 second 
timeout.

Thanks,
Christian.

> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> index dc8d2f52c7d6..fac668c2fcfb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> @@ -510,6 +510,7 @@ struct amdgpu_crtc {
>       bool wb_pending;
>       bool wb_enabled;
>       struct drm_writeback_connector *wb_conn;
> +     int pflip_cnt;
>  };
>  
>  struct amdgpu_encoder_atom_dig {
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 740711ac1037..1c3b7fbab1c6 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -427,6 +427,18 @@ static inline bool 
> update_planes_and_stream_adapter(struct dc *dc,
>                                          stream_update);
>  }
>  
> +static inline bool update_pflip_cnt(struct amdgpu_crtc *acrtc)
> +{
> +     int cnt = acrtc->pflip_cnt++;
> +
> +     if (cnt == 300) {
> +             acrtc->pflip_cnt = 0;
> +             return true;
> +     }
> +
> +     return false;
> +}
> +
>  /**
>   * dm_pflip_high_irq() - Handle pageflip interrupt
>   * @interrupt_params: ignored
> @@ -454,6 +466,9 @@ static void dm_pflip_high_irq(void *interrupt_params)
>               return;
>       }
>  
> +     if (update_pflip_cnt(amdgpu_crtc))
> +             return;
> +
>       spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
>  
>       if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_SUBMITTED) {
> @@ -589,6 +604,9 @@ static void dm_vupdate_high_irq(void *interrupt_params)
>       acrtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - 
> IRQ_TYPE_VUPDATE);
>  
>       if (acrtc) {
> +             if (update_pflip_cnt(acrtc))
> +                     return;
> +
>               vrr_active = amdgpu_dm_crtc_vrr_active_irq(acrtc);
>               drm_dev = acrtc->base.dev;
>               vblank = drm_crtc_vblank_crtc(&acrtc->base);
> @@ -659,6 +677,9 @@ static void dm_crtc_high_irq(void *interrupt_params)
>       if (!acrtc)
>               return;
>  
> +     if (update_pflip_cnt(acrtc))
> +             return;
> +
>       if (acrtc->wb_conn) {
>               spin_lock_irqsave(&acrtc->wb_conn->job_lock, flags);

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