On Wed, Mar 18, 2026 at 12:01:26PM +0100, Cédric Bellegarde wrote:
> dpu_encoder_toggle_vblank_for_crtc() can call control_vblank_irq()
> at any time in response to a userspace vblank request, independently
> of the atomic commit sequence. If this happens before the encoder's
> first atomic_mode_set(), irq[INTR_IDX_RDPTR] is still zero.
>
> Passing irq_idx=0 to dpu_core_irq_register_callback() is treated as
> invalid, and DPU_IRQ_REG(0) and DPU_IRQ_BIT(0) produce misleading
> values of 134217727 and 31 respectively due to unsigned wraparound
> in the (irq_idx - 1) macros, resulting in the confusing error:
>
> [dpu error]invalid IRQ=[134217727, 31]
>
> Since irq[INTR_IDX_RDPTR] will be properly populated by
> atomic_mode_set() and registered by irq_enable() as part of the
> normal modeset sequence, silently skip the vblank IRQ registration
> when the index has not yet been initialized. This matches the
> existing pattern of the master encoder check above it.
>
> Signed-off-by: Cédric Bellegarde <[email protected]>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> index 1aa74ecb08be..8a3e09d21c38 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> @@ -256,6 +256,10 @@ static int dpu_encoder_phys_cmd_control_vblank_irq(
> if (!dpu_encoder_phys_cmd_is_master(phys_enc))
> goto end;
>
> + /* IRQ not yet initialized */
> + if (!phys_enc->irq[INTR_IDX_RDPTR])
> + goto end;
No, it will return success, making the rest of the system wait for the
vblank. Instead the driver in such a case should return -EINVAL or
-ENOENT.
> +
> /* protect against negative */
> if (!enable && refcount == 0) {
> ret = -EINVAL;
> --
> 2.53.0
>
--
With best wishes
Dmitry
