On 3/27/2026 4:46 PM, Konrad Dybcio wrote: > On 3/27/26 1:14 AM, Akhil P Oommen wrote: >> Recent chipsets like Glymur supports a new mechanism for SKU detection. >> A new CX_MISC register exposes the combined (or final) speedbin value >> from both HW fuse register and the Soft Fuse register. Implement this new >> SKU detection along with a new quirk to identify the GPUs that has soft >> fuse support. >> >> There is a side effect of this patch on A4x and older series. The >> speedbin field in the MSM_PARAM_CHIPID will be 0 instead of 0xffff. This >> should be okay as Mesa correctly handles it. Speedbin was not even a >> thing when those GPUs' support were added. >> >> Signed-off-by: Akhil P Oommen <[email protected]> >> --- > > My comments here remain > > https://lore.kernel.org/linux-arm-msm/[email protected]/T/#mc97f65496ba60ecfc977bce1b5bb6d3922711ae3 >
We can ignore the SOFTSKUDISABLED bit in the driver. -Akhil. > Konrad
