On Mon, Jun 29, 2026 at 10:14:26PM +0800, Yongxing Mou wrote: > From: Abhinav Kumar <[email protected]> > > Whenever virtual channel slot allocation changes, the DP > source must send the action control trigger sequence to notify > the sink about the same. This would be applicable during the > start and stop of the pixel stream. Add the infrastructure > to be able to send ACT packets for the DP controller when > operating in MST mode. > > Signed-off-by: Abhinav Kumar <[email protected]> > Signed-off-by: Yongxing Mou <[email protected]> > --- > drivers/gpu/drm/msm/dp/dp_ctrl.c | 44 > ++++++++++++++++++++++++++++++++++++- > drivers/gpu/drm/msm/dp/dp_ctrl.h | 5 ++++- > drivers/gpu/drm/msm/dp/dp_display.c | 3 ++- > drivers/gpu/drm/msm/dp/dp_display.h | 1 + > drivers/gpu/drm/msm/dp/dp_reg.h | 2 ++ > 5 files changed, 52 insertions(+), 3 deletions(-) > > @@ -2623,6 +2656,8 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl > *msm_dp_ctrl, struct msm_dp_panel * > > ctrl = container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, > msm_dp_ctrl); > > + ctrl->mst_active = mst_active; > + > pixel_rate_orig = panel->msm_dp_mode.drm_mode.clock; > pixel_rate = pixel_rate_orig; > > @@ -2658,6 +2693,10 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl > *msm_dp_ctrl, struct msm_dp_panel * > > msm_dp_write_link(ctrl, REG_DP_STATE_CTRL, DP_STATE_CTRL_SEND_VIDEO); > > + ret = msm_dp_ctrl_mst_send_act(msm_dp_ctrl, panel); > + if (ret) > + return ret;
Should not we mark mst_active only here? > + > ret = msm_dp_ctrl_wait4video_ready(ctrl); > if (ret) > return ret; > diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h > index 310e5a1cc934..6808965878d4 100644 > --- a/drivers/gpu/drm/msm/dp/dp_reg.h > +++ b/drivers/gpu/drm/msm/dp/dp_reg.h > @@ -156,6 +156,8 @@ > #define DP_CONFIGURATION_CTRL_BPC_SHIFT (0x08) > #define DP_CONFIGURATION_CTRL_LSCLK_DIV_SHIFT (0x0D) > > +#define REG_DP_MST_ACT (0x00000500) It's not that it is a register in its own register space. > + > #define REG_DP_SOFTWARE_MVID (0x00000010) > #define REG_DP_SOFTWARE_NVID (0x00000018) > #define REG_DP_TOTAL_HOR_VER (0x0000001C) > > -- > 2.43.0 > -- With best wishes Dmitry
