On 7/15/26 14:15, [email protected] wrote:
Thank you for your contribution! Sashiko AI review found 1 potential issue(s)
to consider:
- [Medium] Inconsistent compatibility fallback for 64-bit SoCs (MT8192/MT8195)
violating hardware constraints described in the commit.
--
--- Patch [10]: [PATCH v5 10/11] dt-bindings: display: mediatek: wdma: Add
compatibles for more SoCs ---
commit ffb6d1b73de2ee2d9fba381dca064a6d8fef7acf
Author: AngeloGioacchino Del Regno <[email protected]>
dt-bindings: display: mediatek: wdma: Add compatibles for more SoCs
This commit adds missing compatibles for the Write DMA hardware in the
Display Controller for Dimensity 1200 (MT6893) and Kompanio
500/520/820/1200 (MT8183/MT8186/MT8192/MT8195).
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml
@@ -22,11 +22,16 @@ properties:
compatible:
oneOf:
- enum:
+ - mediatek,mt6893-disp-wdma
- mediatek,mt8173-disp-wdma
- items:
- enum:
- mediatek,mt6795-disp-wdma
- mediatek,mt8167-disp-wdma
+ - mediatek,mt8183-disp-wdma
+ - mediatek,mt8186-disp-wdma
+ - mediatek,mt8192-disp-wdma
+ - mediatek,mt8195-disp-wdma
- const: mediatek,mt8173-disp-wdma
[Severity: Medium]
The commit message explicitly excludes MT6893 from falling back to
MT8173 because it introduces support for destination addresses larger
than 32 bits. Should this same rule apply to MT8192 and MT8195?
Since MT8195 (Kompanio 1200) and MT6893 (Dimensity 1200) are the same
generation of SoCs sharing the same IP, grouping MT8192 and MT8195 here
implies they can safely fall back to the legacy 32-bit driver.
What?! No!! They're not the same SoC generation, and THAT is also why they
are not compatible with each other?!?!?!?!?!?! :-)))))
Cheers!
If an OS binds a legacy 32-bit driver to the MT8195 WDMA using this
fallback, won't it misprogram the DMA addresses by truncating them to 32
bits when attempting a DMA operation above 4GB?
