Define 8M survivability partition for CRI when
storage is open for write.

Signed-off-by: Alexander Usyskin <[email protected]>
---
 drivers/gpu/drm/xe/xe_nvm.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_nvm.c b/drivers/gpu/drm/xe/xe_nvm.c
index 1ea67eaeae24..54de0dbe1fa4 100644
--- a/drivers/gpu/drm/xe/xe_nvm.c
+++ b/drivers/gpu/drm/xe/xe_nvm.c
@@ -55,10 +55,11 @@ static bool xe_nvm_non_posted_erase(struct xe_device *xe)
        }
 }
 
-static bool xe_nvm_writable_override(struct xe_device *xe)
+static bool xe_nvm_writable_override(struct xe_device *xe, size_t 
*survivability_size)
 {
        struct xe_mmio *mmio = xe_root_tile_mmio(xe);
        bool writable_override;
+       size_t s_size = 0;
        struct xe_reg reg;
        u32 test_bit, test_val;
 
@@ -67,6 +68,7 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
                reg = PCODE_SCRATCH(0);
                test_bit = FDO_MODE;
                test_val = FDO_MODE;
+               s_size = SZ_8M;
                break;
        case XE_BATTLEMAGE:
                reg = HECI_FWSTS2(DG2_GSC_HECI2_BASE);
@@ -90,12 +92,17 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
                break;
        default:
                drm_err(&xe->drm, "Unknown platform\n");
+               *survivability_size = 0;
                return true;
        }
 
        writable_override = (xe_mmio_read32(mmio, reg) & test_bit) == test_val;
-       if (writable_override)
+       if (writable_override) {
                drm_info(&xe->drm, "NVM access overridden by jumper\n");
+               *survivability_size = s_size;
+       } else {
+               *survivability_size = 0;
+       }
        return writable_override;
 }
 
@@ -142,7 +149,7 @@ int xe_nvm_init(struct xe_device *xe)
        if (!nvm)
                return -ENOMEM;
 
-       nvm->writable_override = xe_nvm_writable_override(xe);
+       nvm->writable_override = xe_nvm_writable_override(xe, 
&nvm->survivability_size);
        nvm->non_posted_erase = xe_nvm_non_posted_erase(xe);
        nvm->bar.parent = &pdev->resource[0];
        nvm->bar.start = GEN12_GUNIT_NVM_BASE + pdev->resource[0].start;

-- 
2.53.0

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