On Thu Aug 20, 2026 at 8:05 AM JST, Alistair Popple wrote:
> On 2026-08-10 at 23:55 +1000, Eliot Courtney <[email protected]> wrote...
>> From: Joel Fernandes <[email protected]>
>> 
>> PRAMIN apertures are a crucial mechanism for direct CPU read/write to
>> VRAM. Add a `Pramin` manager whose `window_at()` returns a typed MMIO
>> view of VRAM through the 1 MiB PRAMIN aperture in BAR0, validating the
>> view against the VRAM region and repositioning the window as needed for
>> the accessed address.
>> 
>> A view borrows `Pramin` mutably, so the window cannot move while
>> the view is in use, and it inserts an ordering point on Drop.
>> 
>> Signed-off-by: Joel Fernandes <[email protected]>
>> [ecourtney: split the registers and HAL into the two preceding patches]
>> [ecourtney: rebase w.r.t. Bar0 lifetime changes and register projections]
>> [ecourtney: drop the window guard and mutex, use &mut self]
>> [ecourtney: position at init to avoid reads, reposition in window_offset]
>> [ecourtney: return typed MMIO views instead of read/write accessors]
>> [ecourtney: insert an ordering read when a view drops]
>> [ecourtney: declare the window location, drop the doc examples]
>> [ecourtney: add the copyright header, doc and naming cleanups]
>> [ecourtney: the pramin module is mm-internal]
>> Co-developed-by: Eliot Courtney <[email protected]>
>> Signed-off-by: Eliot Courtney <[email protected]>
>> ---
>>  drivers/gpu/nova-core/mm.rs        |   1 +
>>  drivers/gpu/nova-core/mm/pramin.rs | 178 
>> +++++++++++++++++++++++++++++++++++++
>>  2 files changed, 179 insertions(+)
>> 
>> diff --git a/drivers/gpu/nova-core/mm.rs b/drivers/gpu/nova-core/mm.rs
>> index 07dce4ce2473..ef5b1cad56c3 100644
>> --- a/drivers/gpu/nova-core/mm.rs
>> +++ b/drivers/gpu/nova-core/mm.rs
>> @@ -20,6 +20,7 @@
>>  };
>>  
>>  mod hal;
>> +mod pramin;
>>  mod regs;
>>  
>>  /// Physical VRAM address in GPU video memory.
>> diff --git a/drivers/gpu/nova-core/mm/pramin.rs 
>> b/drivers/gpu/nova-core/mm/pramin.rs
>> new file mode 100644
>> index 000000000000..20be3fc471ba
>> --- /dev/null
>> +++ b/drivers/gpu/nova-core/mm/pramin.rs
>> @@ -0,0 +1,178 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & 
>> AFFILIATES. All rights reserved.
>> +
>> +//! Utilities for accessing VRAM through the PRAMIN window.
>> +
>> +use core::ops::Range;
>> +
>> +use kernel::{
>> +    io::{
>> +        io_project,
>> +        register,
>> +        register::OffsetLoc,
>> +        Io,
>> +        Mmio, //
>> +    },
>> +    prelude::*,
>> +    ptr::{
>> +        Alignable,
>> +        Alignment, //
>> +    },
>> +    sizes::{
>> +        SZ_1M,
>> +        SZ_64K, //
>> +    },
>> +};
>> +
>> +use crate::{
>> +    driver::{
>> +        Bar0,
>> +        NovaRegisters, //
>> +    },
>> +    gpu::Chipset,
>> +    mm::{
>> +        hal::{
>> +            self,
>> +            MmHal, //
>> +        },
>> +        VramAddress, //
>> +    },
>> +    num::IntoSafeCast, //
>> +};
>> +
>> +/// Size of the PRAMIN window (1 MiB).
>> +const WINDOW_SIZE: usize = SZ_1M;
>> +
>> +/// The PRAMIN window, which is a 1 MiB window into VRAM at a fixed BAR0 
>> offset.
>> +#[derive(FromBytes, IntoBytes)]
>> +struct PraminWindow([u8; WINDOW_SIZE]);
>> +
>> +register! {
>> +    base: NovaRegisters;
>
> I tried building this on drm-rust-next against the base commit
> (4c9ba407018e8deb06dbc643112bac8f40404f95) but am getting some build errors:

I think you also need [1] (the v3 might also work, but not tested yet).

[1] 
https://patch.msgid.link/[email protected]

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