While trying to get Raspberry Pi display v1.1 working on Beagleboard platforms, I noticed various small issues with the tc358762 driver.
The series also contains a patch to fix the timings in the powertip,ph800480t013-idf02 panel. The combination of tc358762 + ph800480t013 is used in the Raspberry Pi display module, so it makes sense to fix them together. Signed-off-by: Tomi Valkeinen <[email protected]> --- Changes in v4: - Rebased on latest upstream, fixing the minor compilation issues that it brought - Added R-b tags - Link to v3: https://lore.kernel.org/r/[email protected] Changes in v3: - Add missing #include <linux/bitfield.h> - New patch: "drm/panel-simple: Fix powertip,ph800480t013-idf02 timings" - Link to v2: https://lore.kernel.org/r/[email protected] Changes in v2: - Always enable VTG. There should be no downside, and it fixes unstable hsync - Add four new patches at the end - Extend the patch desc in "Drop SPICMR write" a bit - Link to v1: https://lore.kernel.org/r/[email protected] --- Tomi Valkeinen (13): drm/bridge: tc358762: Clean up register defines drm/bridge: tc358762: Improve SYSCTRL register defines drm/bridge: tc358762: Improve LCDCTRL defines drm/bridge: tc358762: Configure SYSCTRL first drm/bridge: tc358762: Drop SPICMR write drm/bridge: tc358762: Improve DPI enable handling drm/bridge: tc358762: Update comment about the number of lanes drm/bridge: tc358762: Support VTG drm/bridge: tc358762: Fix sync polarities drm/bridge: tc358762: Move tc358762_init() into tc358762_enable() drm/bridge: tc358762: Drop drm_bridge_funcs.mode_set drm/bridge: tc358762: Set DE_POL and DCLK_POL properly drm/panel-simple: Fix powertip,ph800480t013-idf02 timings drivers/gpu/drm/bridge/tc358762.c | 203 +++++++++++++++++++++++------------ drivers/gpu/drm/panel/panel-simple.c | 14 +-- 2 files changed, 144 insertions(+), 73 deletions(-) --- base-commit: 8d3ae59288f1e7d58d76558a6ee96d533bc5019f change-id: 20260326-tc358762-fixes-6f666500da9e Best regards, -- Tomi Valkeinen <[email protected]>
